<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/i915/intel_mocs.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2018-02-21T20:57:22Z</updated>
<entry>
<title>drm/i915: Rename drm_i915_gem_request to i915_request</title>
<updated>2018-02-21T20:57:22Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2018-02-21T09:56:36Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e61e0f51ba7974bb575cdc23220b573e5cd4ff2a'/>
<id>urn:sha1:e61e0f51ba7974bb575cdc23220b573e5cd4ff2a</id>
<content type='text'>
We want to de-emphasize the link between the request (dependency,
execution and fence tracking) from GEM and so rename the struct from
drm_i915_gem_request to i915_request. That is we may implement the GEM
user interface on top of requests, but they are an abstraction for
tracking execution rather than an implementation detail of GEM. (Since
they are not tied to HW, we keep the i915 prefix as opposed to intel.)

In short, the spatch:
@@

@@
- struct drm_i915_gem_request
+ struct i915_request

A corollary to contracting the type name, we also harmonise on using
'rq' shorthand for local variables where space if of the essence and
repetition makes 'request' unwieldy. For globals and struct members,
'request' is still much preferred for its clarity.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Cc: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180221095636.6649-1-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Reviewed-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
Acked-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Use INTEL_GEN everywhere</title>
<updated>2018-02-09T22:29:02Z</updated>
<author>
<name>Tvrtko Ursulin</name>
<email>tvrtko.ursulin@intel.com</email>
</author>
<published>2018-02-09T21:58:46Z</published>
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<id>urn:sha1:c56b89f16dd0e7d979399bfe94b4056103dd16a8</id>
<content type='text'>
Coccinelle patch:

 @@
 identifier p;
 @@
 -INTEL_INFO(p)-&gt;gen
 +INTEL_GEN(p)

Signed-off-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180208130606.15556-12-tvrtko.ursulin@linux.intel.com
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180209215847.6660-1-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915/cnl: Cannonlake has same MOCS table than Skylake.</title>
<updated>2017-06-07T14:29:51Z</updated>
<author>
<name>Rodrigo Vivi</name>
<email>rodrigo.vivi@intel.com</email>
</author>
<published>2017-06-06T20:30:37Z</published>
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<id>urn:sha1:1dc0766c33473d61fd85caa5031daf34f719cd3f</id>
<content type='text'>
All registers and default configuration are the same for Skylake
and Cannonlake.

v2: Don't apply Wa for platforms without MOCS. (Paulo)

v3: Removed WaDisableSkipCaching that Joonas noticed that
according to spec it is not applicable to CNL.

Cc: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-8-git-send-email-rodrigo.vivi@intel.com
</content>
</entry>
<entry>
<title>drm/i915: Emit to ringbuffer directly</title>
<updated>2017-02-14T14:30:46Z</updated>
<author>
<name>Tvrtko Ursulin</name>
<email>tvrtko.ursulin@intel.com</email>
</author>
<published>2017-02-14T11:32:42Z</published>
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<id>urn:sha1:73dec95e6ba37d8138bb111be5c9b8a1f3a622ae</id>
<content type='text'>
This removes the usage of intel_ring_emit in favour of
directly writing to the ring buffer.

intel_ring_emit was preventing the compiler for optimising
fetch and increment of the current ring buffer pointer and
therefore generating very verbose code for every write.

It had no useful purpose since all ringbuffer operations
are started and ended with intel_ring_begin and
intel_ring_advance respectively, with no bail out in the
middle possible, so it is fine to increment the tail in
intel_ring_begin and let the code manage the pointer
itself.

Useless instruction removal amounts to approximately
two and half kilobytes of saved text on my build.

Not sure if this has any measurable performance
implications but executing a ton of useless instructions
on fast paths cannot be good.

v2:
 * Change return from intel_ring_begin to error pointer by
   popular demand.
 * Move tail increment to intel_ring_advance to enable some
   error checking.

v3:
 * Move tail advance back into intel_ring_begin.
 * Rebase and tidy.

v4:
 * Complete rebase after a few months since v3.

v5:
 * Remove unecessary cast and fix !debug compile. (Chris Wilson)

v6:
 * Make intel_ring_offset take request as well.
 * Fix recording of request postfix plus a sprinkle of asserts.
   (Chris Wilson)

v7:
 * Use intel_ring_offset to get the postfix. (Chris Wilson)
 * Convert GVT code as well.

v8:
 * Rename *out++ to *cs++.

v9:
 * Fix GVT out to cs conversion in GVT.

v10:
 * Rebase for new intel_ring_begin in selftests.

Signed-off-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Zhi Wang &lt;zhi.a.wang@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Acked-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170214113242.29241-1-tvrtko.ursulin@linux.intel.com
</content>
</entry>
<entry>
<title>drm/i915/glk: Turn on workarounds that apply to Geminilake too</title>
<updated>2017-01-30T07:49:07Z</updated>
<author>
<name>Ander Conselvan de Oliveira</name>
<email>ander.conselvan.de.oliveira@intel.com</email>
</author>
<published>2017-01-26T09:16:58Z</published>
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<id>urn:sha1:9fb5026f857dc3145cf13eedabadb28ed028d093</id>
<content type='text'>
Apply workarounds to Geminilake, and annotate those that are applied
unconditionally when they apply to GLK based on the workaround database.

v2: Fix commit message typos. (David)
v3: Rebase.
Cc: David Weinehall &lt;david.weinehall@linux.intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@gmail.com&gt;
Signed-off-by: Ander Conselvan de Oliveira &lt;ander.conselvan.de.oliveira@intel.com&gt;
Reviewed-by: David Weinehall &lt;david.weinehall@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1485422218-9102-1-git-send-email-ander.conselvan.de.oliveira@intel.com
</content>
</entry>
<entry>
<title>drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.</title>
<updated>2017-01-24T18:29:00Z</updated>
<author>
<name>Rodrigo Vivi</name>
<email>rodrigo.vivi@intel.com</email>
</author>
<published>2017-01-23T18:32:37Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b976dc53ec43da887fb5731f2f7e1f770cec6074'/>
<id>urn:sha1:b976dc53ec43da887fb5731f2f7e1f770cec6074</id>
<content type='text'>
Along with GLK it was introduced the .is_lp and IS_GEN9_LP.
So, following the same simplification standard we can
put Skylake and Kabylake under the same bucket for most
of the things.

So let's add the IS_GEN9_BC for "Big Core" (non Atom based
platforms).

The i915_drv.c was let out of this patch on purpose
because that is really a decision per platform, just like
other cases where IS_KABYLAKE is different from IS_SKYLAKE.

v2: fix conflict with IS_LP and 3 new cases for this
    big core bucket:
    - intel_ddi.c: intel_ddi_get_link_dpll
    - intel_fbc.c: find_compression_threshold
    - i915_gem_gtt.c: gtt_write_workarounds

Cc: Anusha Srivatsa &lt;anusha.srivatsa@intel.com&gt;
Cc: Ander Conselvan de Oliveira &lt;ander.conselvan.de.oliveira@intel.com&gt;
Cc: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Ander Conselvan de Oliveira &lt;conselvan2@gmail.com&gt;
Acked-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1485196357-30599-2-git-send-email-rodrigo.vivi@intel.com
</content>
</entry>
<entry>
<title>drm/i915/glk: Reuse broxton code for geminilake</title>
<updated>2016-12-02T14:38:56Z</updated>
<author>
<name>Ander Conselvan de Oliveira</name>
<email>ander.conselvan.de.oliveira@intel.com</email>
</author>
<published>2016-12-02T08:23:49Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cc3f90f0633c5f08044ba898e3fbf942d2e26cb3'/>
<id>urn:sha1:cc3f90f0633c5f08044ba898e3fbf942d2e26cb3</id>
<content type='text'>
Geminilake is mostly backwards compatible with broxton, so change most
of the IS_BROXTON() checks to IS_GEN9_LP(). Differences between the
platforms will be implemented in follow-up patches.

v2: Don't reuse broxton's path in intel_update_max_cdclk().
    Don't set plane count as in broxton.

v3: Rebase

v4: Include the check intel_bios_is_port_hpd_inverted().
    Commit message.

v5: Leave i915_dmc_info() out; glk's csr version != bxt's. (Rodrigo)

v6: Rebase.

v7: Convert a few mode IS_BROXTON() occurances in pps, ddi, dsi and pll
    code. (Rodrigo)

v8: Squash a couple of DDI patches with more conversions. (Rodrigo)

Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Ander Conselvan de Oliveira &lt;ander.conselvan.de.oliveira@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1480667037-11215-2-git-send-email-ander.conselvan.de.oliveira@intel.com
</content>
</entry>
<entry>
<title>drm/i915: Make various init functions take dev_priv</title>
<updated>2016-12-01T18:01:15Z</updated>
<author>
<name>Tvrtko Ursulin</name>
<email>tvrtko.ursulin@intel.com</email>
</author>
<published>2016-12-01T14:16:38Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bf9e8429ab9747f584e692bad52a7a9f1787a4da'/>
<id>urn:sha1:bf9e8429ab9747f584e692bad52a7a9f1787a4da</id>
<content type='text'>
Like GEM init, GUC init, MOCS init and context creation.

Enables them to lose dev_priv locals.

Signed-off-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Rename struct intel_ringbuffer to struct intel_ring</title>
<updated>2016-08-02T21:58:16Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-08-02T21:50:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7e37f889b50e798fc17f74e561b06a8715bee5a2'/>
<id>urn:sha1:7e37f889b50e798fc17f74e561b06a8715bee5a2</id>
<content type='text'>
The state stored in this struct is not only the information about the
buffer object, but the ring used to communicate with the hardware. Using
buffer here is overly specific and, for me at least, conflates with the
notion of buffer objects themselves.

s/struct intel_ringbuffer/struct intel_ring/
s/enum intel_ring_hangcheck/enum intel_engine_hangcheck/
s/describe_ctx_ringbuf()/describe_ctx_ring()/
s/intel_ring_get_active_head()/intel_engine_get_active_head()/
s/intel_ring_sync_index()/intel_engine_sync_index()/
s/intel_ring_init_seqno()/intel_engine_init_seqno()/
s/ring_stuck()/engine_stuck()/
s/intel_cleanup_engine()/intel_engine_cleanup()/
s/intel_stop_engine()/intel_engine_stop()/
s/intel_pin_and_map_ringbuffer_obj()/intel_pin_and_map_ring()/
s/intel_unpin_ringbuffer()/intel_unpin_ring()/
s/intel_engine_create_ringbuffer()/intel_engine_create_ring()/
s/intel_ring_flush_all_caches()/intel_engine_flush_all_caches()/
s/intel_ring_invalidate_all_caches()/intel_engine_invalidate_all_caches()/
s/intel_ringbuffer_free()/intel_ring_free()/

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1469432687-22756-15-git-send-email-chris@chris-wilson.co.uk
Link: http://patchwork.freedesktop.org/patch/msgid/1470174640-18242-4-git-send-email-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Rename request-&gt;ringbuf to request-&gt;ring</title>
<updated>2016-08-02T21:58:15Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-08-02T21:50:19Z</published>
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<id>urn:sha1:1dae2dfb0bfd9c148f2b26277ef961033c4c1184</id>
<content type='text'>
Now that we have disambuigated ring and engine, we can use the clearer
and more consistent name for the intel_ringbuffer pointer in the
request.

@@
struct drm_i915_gem_request *r;
@@
- r-&gt;ringbuf
+ r-&gt;ring

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1469432687-22756-12-git-send-email-chris@chris-wilson.co.uk
Link: http://patchwork.freedesktop.org/patch/msgid/1470174640-18242-2-git-send-email-chris@chris-wilson.co.uk
</content>
</entry>
</feed>
