kernel/drivers/gpu/drm/i915/intel_atomic.c, branch linux-4.16.y

drm/i915/cnl: Fix Cannonlake scaler mode programing.

2017-06-12T16:45:55Z

As Geminilake scalers Cannonlake also don't need and don't have the "high quality" mode programming. Cc: Ander Conselvan de Oliveira Signed-off-by: Rodrigo Vivi Reviewed-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/1497047175-27250-15-git-send-email-rodrigo.vivi@intel.com

drm/i915: Convert intel_sdvo connector properties to atomic.

2017-05-30T08:33:28Z

SDVO was the last connector that's still using the legacy paths for properties, and this is with a reason! This connector implements a lot of properties dynamically, and some of them shared with the digital connector state, so sdvo_connector_state subclasses intel_digital_connector_state. set_property had a lot of validation, but this is handled in the drm core, so most of the validation can die off. The properties are written right before enabling the connector, since there is no good way to update the properties without crtc. Signed-off-by: Maarten Lankhorst Reviewed-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/20170501133804.8116-13-maarten.lankhorst@linux.intel.com

drm/i915: Add plumbing for digital connector state, v3.

2017-05-30T08:33:24Z

Some atomic properties are common between the various kinds of connectors, for example a lot of them use panel fitting mode. It makes sense to put a lot of it in a common place, so each connector can use it while they're being converted. Implement the properties required for the connectors: - scaling mode property - force audio property - broadcast rgb - aspect ratio While at it, make clear that intel_digital_connector_atomic_get_property is a hack that has to be removed when all connector properties are converted to atomic. Changes since v1: - Scaling mode and aspect ratio are partly handled in core now. Changes since v2: - Split out the scaling mode / aspect ratio changes to a preparation patch. - Use mode_changed for panel fitter, changes to this property are checked by fastset. - Allowed_scaling_modes is removed, handled through core now. Signed-off-by: Maarten Lankhorst Reviewed-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/20170501133804.8116-6-maarten.lankhorst@linux.intel.com

drm/i915: Skip useless watermark/FIFO related work on VLV/CHV when not needed

2017-03-03T14:50:10Z

Check whether anything relevant has actually change when we compute new watermarks for each plane in the state. If the watermarks for no primary/sprite planes changed we don't have to recompute the FIFO split or reprogram the DSBARB registers. And even the cursor watermarks didn't change we can skip the merge+invert step between all the planes on the pipe as well. v2: s/noninverted/raw/ for consistency with other platforms v3: Drop duplicated vlv_get_fifo_size() call during init Signed-off-by: Ville Syrjälä Reviewed-by: Maarten Lankhorst Link: http://patchwork.freedesktop.org/patch/msgid/20170302171508.1666-9-ville.syrjala@linux.intel.com

drm/i915/glk: Fix Geminilake scalers mode programming

2017-02-23T12:57:01Z

Geminilake scalers can do 7x7 filtering for all supported input sizes, so it doesn't need the "high quality" mode programming, which was actually removed from that platform. v2: Split dev_priv parameter change out. (Ville) Cc: Ville Syrjälä , Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/20170223071600.14356-5-ander.conselvan.de.oliveira@intel.com

drm/i915/glk: Pass dev_priv to intel_atomic_setup_scalers()

2017-02-23T12:56:51Z

Pass dev_priv to intel_atomic_setup_scalers(). The next patch will need a dev_priv pointer. Cc: Ville Syrjälä Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/20170223071600.14356-4-ander.conselvan.de.oliveira@intel.com

drm/i915: Move intel_atomic_get_shared_dpll_state() to intel_dpll_mgr.c

2017-01-02T09:31:53Z

The function intel_atomic_get_shared_dpll_state() is only called from intel_dpll_mgr.c and it concerns the same data structures as the other functions in that file, so move it there and make it static. Signed-off-by: Ander Conselvan de Oliveira Suggested-by: Daniel Vetter Reviewed-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/1483024933-3726-8-git-send-email-ander.conselvan.de.oliveira@intel.com

drm/i915: Rename intel_shared_dpll_config to intel_shared_dpll_state

2016-12-30T07:26:10Z

Struct intel_shared_dpll_config is used to hold the state of the DPLL in the "atomic" sense, so call it state like everything else atomic. v2: Rebase Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Daniel Vetter (v1) Link: http://patchwork.freedesktop.org/patch/msgid/1483024933-3726-4-git-send-email-ander.conselvan.de.oliveira@intel.com

drm: Consolidate plane arrays in drm_atomic_state

2016-06-02T15:20:25Z

It's kinda pointless to have 2 separate mallocs for these. And when we add more per-plane state in the future it's even more pointless. Right now there's no such thing planned, but both Gustavo's per-crtc fence patches, and some nonblocking commit helpers I'm playing around with will add more per-crtc stuff. It makes sense to also consolidate planes, just for consistency. In the future we can use this to store a pointer to the preceeding state, making an atomic update entirely free-standing. This will be needed to be able to queue them up with a depth > 1. Cc: Gustavo Padovan Reviewed-by: Maarten Lankhorst Signed-off-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/1464818821-5736-11-git-send-email-daniel.vetter@ffwll.ch

drm/i915: Use drm_atomic_get_existing_plane_state

2016-06-02T13:39:55Z

We want to encapsulate the drm_atomic_state internals. v2: Use intel_atomic_get_existing_plane_state (Maarten). Reviewed-by: Maarten Lankhorst Signed-off-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/1464818821-5736-3-git-send-email-daniel.vetter@ffwll.ch