kernel/drivers/gpu/drm/i915/i915_reg_defs.h, branch master

drm/i915/reg_defs: Add REG_FIELD_MAX wrapper for FIELD_MAX()

2025-09-25T13:08:19Z

Introduce REG_FIELD_MAX macro as local wrapper around FIELD_MAX() to return the maximum value representable by a bit mask. The value is cast to u32 for consistency with other REG_* macros and assumes the bitfield fits within 32 bits. v2: Use __mask as macro argument aligning with other macros. (Ville) Signed-off-by: Ankit Nautiyal Reviewed-by: Ville Syrjälä Reviewed-by: Andi Shyti Link: https://lore.kernel.org/r/20250924141542.3122126-8-ankit.k.nautiyal@intel.com

drm/i915: Convert REG_GENMASK() to fixed-width GENMASK_U()

2025-04-29T19:58:38Z

Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use them to implement the i915/xe specific macros. Converting each driver to use the generic macros are left for later, when/if other driver-specific macros are also generalized. Signed-off-by: Lucas De Marchi Acked-by: Jani Nikula Signed-off-by: Vincent Mailhol Signed-off-by: Yury Norov

drm/i915: Introduce i915_error_regs

2025-02-17T23:25:31Z

Introduce i915_error_regs as the EIR/EMR counterpart to the IIR/IMR/IER i915_irq_regs, and update the irq reset/postingstall to utilize them accordingly. v2: Include xe compat versions Reviewed-by: Vinod Govindapillai Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250217070047.953-7-ville.syrjala@linux.intel.com Acked-by: Rodrigo Vivi

drm/i915/irq: add struct i915_irq_regs triplet

2024-10-03T12:42:41Z

Add struct i915_irq_regs to hold IMR/IER/IIR register offsets to pass to gen3_irq_reset() and gen3_irq_init(). This helps in grouping the registers and further cleanup. Note: gen3_irq_reset() and gen3_irq_init() really did have the IMR/IER/IIR parameters in different order. Reviewed-by: Rodrigo Vivi Link: https://patchwork.freedesktop.org/patch/msgid/20241002102645.136155-1-jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915: Add 16bit register/mask operators

2023-05-19T17:02:34Z

Add the support macros to define/extract bits as 16bits. v2: checkpatch fixes Reviewed-by: Gustavo Sousa Signed-off-by: Clint Taylor Signed-off-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20230515231725.3815199-2-clinton.a.taylor@intel.com

drm/i915/mtl: Add Support for C10 PHY message bus and pll programming

2023-04-14T15:12:40Z

XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy has a dedicated PIPE 5.2 Message bus for configuration. This message bus is used to configure the phy internal registers. XELPDP has C10 phys to drive output to the EDP and the native output from the display engine. Add structures, programming hardware state readout logic. Port clock calculations are similar to DG2. Use the DG2 formulae to calculate the port clock but use the relevant pll signals. Note: PHY lane 0 is always used for PLL programming. Add sequences for C10 phy enable/disable phy lane reset, powerdown change sequence and phy lane programming. Bspec: 64539, 64568, 64599, 65100, 65101, 65450, 65451, 67610, 67636 v2: Squash patches related to C10 phy message bus and pll programming support (Jani) Move register definitions to a new file i.e. intel_cx0_reg_defs.h (Jani) Move macro definitions (Jani) DP rates as separate patch (Jani) Spin out xelpdp register definitions into a separate file (Jani) Replace macro to select registers based on phy lane with function calls (Jani) Fix styling issues (Jani) Call XELPDP_PORT_P2M_MSGBUS_STATUS() with port instead of phy (Lucas) v3: Move clear request flag into try-loop v4: On PHY idle change drm_err_once() as drm_dbg_kms() (Jani) use __intel_de_wait_for_register() instead of __intel_wait_for_register and uncomment intel_uncore.h (Jani) Add DP-alt support for PHY lane programming (Khaled) v4: Add tx and cmn on c10mpllb_state (Imre) Add missing waits for pending transactions between two message bus writes (Imre) General cleanups and simplifications (Imre) v5: Few nit cleanups from rev4 (imre) s/dev_priv/i915/ , s/c10mpllb/c10pll/ (RK) Rebase v6: Move the mtl code from intel_c10pll_calc_port_clock to mtl function Fix typo in comment for REG_FIELD_PREP8 definition(Imre) Cc: Mika Kahola Cc: Imre Deak Cc: Uma Shankar Cc: Gustavo Sousa Signed-off-by: Radhakrishna Sripada Signed-off-by: Mika Kahola Reviewed-by: Imre Deak (v4) Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-4-radhakrishna.sripada@intel.com

drm/i915: Move MCR_REG define to i915_reg_defs.h

2023-02-25T19:24:09Z

Define MCR_REG() in the same header where i915_mcr_reg_t is defined, like i915_reg_t and _MMIO(). It's a more natural place for such a definition so it's not mixed with the registers for the platforms. Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20230224211221.1557268-1-lucas.demarchi@intel.com

drm/i915: Add _PICK_EVEN_2RANGES()

2023-01-27T16:52:03Z

It's a constant pattern in the driver to need to use 2 ranges of MMIOs based on port, phy, pll, etc. When that happens, instead of using _PICK_EVEN(), _PICK() needs to be used. Using _PICK() is discouraged due to some reasons like: 1) It increases the code size since the array is declared in each call site 2) Developers need to be careful not to incur an out-of-bounds array access 3) Developers need to be careful that the indexes match the table. For that it may be that the table needs to contain holes, making (1) even worse. Add a variant of _PICK_EVEN() that works with 2 ranges and selects which one to use depending on the index value. v2: Fix the address expansion in the example (Anusha) v3: Also rename macro to _PICK_EVEN_2RANGES() in the documentation and reword it to clarify what ranges are chosen based on the index (Jani) Signed-off-by: Lucas De Marchi Reviewed-by: Anusha Srivatsa Acked-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/20230125182403.7526-1-lucas.demarchi@intel.com

Merge drm/drm-next into drm-intel-next

2022-11-14T19:32:34Z

Catch up on 6.1-rc cycle in order to solve the intel_backlight conflict on linux-next. Signed-off-by: Rodrigo Vivi

drm/i915: split out intel_display_reg_defs.h

2022-11-11T10:44:49Z

Split out the display register helper macros to a separate file. For now, include it from i915_reg.h, but note that there are already files that don't need i915_reg.h, such as intel_audio.c. Cc: Lucas De Marchi Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/3af47193ff5219b6d2cfe353b752ec4bb44de4f1.1668008071.git.jani.nikula@intel.com