<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/i915/i915_gem_context.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
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<updated>2018-03-07T13:07:20Z</updated>
<entry>
<title>drm/i915/icl: new context descriptor support</title>
<updated>2018-03-07T13:07:20Z</updated>
<author>
<name>Daniele Ceraolo Spurio</name>
<email>daniele.ceraolospurio@intel.com</email>
</author>
<published>2018-03-02T16:14:58Z</published>
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<id>urn:sha1:ac52da6af826d05f02c03fcde4a0651d070783b2</id>
<content type='text'>
Starting from Gen11 the context descriptor format has been updated in
the HW. The hw_id field has been considerably reduced in size and engine
class and instance fields have been added.

There is a slight name clashing issue because the field that we call
hw_id is actually called SW Context ID in the specs for Gen11+.

With the current size of the hw_id field we can have a maximum of 2k
contexts at any time, but we could use the sw_counter field (which is sw
defined) to increase that because the HW requirement is that
engine_id + sw id + sw_counter is a unique number.
GuC uses a similar method to support more contexts but does its tracking
at lrc level. To avoid doing an implementation that will need to be
reworked once GuC support lands, defer it for now and mark it as TODO.

v2: rebased, add documentation, fix GEN11_ENGINE_INSTANCE_SHIFT
v3: rebased, bring back lost code from i915_gem_context.c
v4: make TODO comment more generic
v5: be consistent with bit ordering, add extra checks (Chris)

Cc: Oscar Mateo &lt;oscar.mateo@intel.com&gt;
Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Signed-off-by: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Reviewed-by: Oscar Mateo &lt;oscar.mateo@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-3-mika.kuoppala@linux.intel.com
Signed-off-by: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Rename drm_i915_gem_request to i915_request</title>
<updated>2018-02-21T20:57:22Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2018-02-21T09:56:36Z</published>
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<id>urn:sha1:e61e0f51ba7974bb575cdc23220b573e5cd4ff2a</id>
<content type='text'>
We want to de-emphasize the link between the request (dependency,
execution and fence tracking) from GEM and so rename the struct from
drm_i915_gem_request to i915_request. That is we may implement the GEM
user interface on top of requests, but they are an abstraction for
tracking execution rather than an implementation detail of GEM. (Since
they are not tied to HW, we keep the i915 prefix as opposed to intel.)

In short, the spatch:
@@

@@
- struct drm_i915_gem_request
+ struct i915_request

A corollary to contracting the type name, we also harmonise on using
'rq' shorthand for local variables where space if of the essence and
repetition makes 'request' unwieldy. For globals and struct members,
'request' is still much preferred for its clarity.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Cc: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180221095636.6649-1-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Reviewed-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
Acked-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Remove lost comment from i915_gem_context</title>
<updated>2018-02-08T13:59:17Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2018-02-08T11:15:59Z</published>
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<id>urn:sha1:3d4b7caf2ba2773e9beda85c5e031dfffc6644af</id>
<content type='text'>
The comment is very old and quite misleading now.

drivers/gpu/drm/i915/i915_gem_context.c:349: warning: No description found for parameter 'dev_priv'
drivers/gpu/drm/i915/i915_gem_context.c:349: warning: No description found for parameter 'file_priv'

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Lionel Landwerlin &lt;lionel.g.landwerlin@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180208111559.32663-1-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Avoid truncation before clamping userspace's priority value</title>
<updated>2018-02-08T11:30:00Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2018-02-08T08:51:51Z</published>
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<id>urn:sha1:11a18f631959fd1ca10856c836a827683536770c</id>
<content type='text'>
Userspace provides a 64b value for the priority, we need to be careful
to preserve the full range before validation to prevent truncation (and
letting an illegal value pass).

Reported-by: Antonio Argenziano &lt;antonio.argenziano@intel.com&gt;
Fixes: ac14fbd460d0 ("drm/i915/scheduler: Support user-defined priorities")
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Antonio Argenziano &lt;antonio.argenziano@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@intel.com&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180208085151.11480-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Only allocate preempt context when required</title>
<updated>2018-02-08T07:30:16Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2018-02-07T21:05:44Z</published>
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<id>urn:sha1:d63763749127b483ba042b2939ba39fd79792330</id>
<content type='text'>
If we remove some hardcoded assumptions about the preempt context having
a fixed id, reserved from use by normal user contexts, we may only
allocate the i915_gem_context when required. Then the subsequent
decisions on using preemption reduce to having the preempt context
available.

v2: Include an assert that we don't allocate the preempt context twice.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Cc: Arkadiusz Hiler &lt;arkadiusz.hiler@intel.com&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@intel.com&gt;
Cc: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Acked-by: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180207210544.26351-3-chris@chris-wilson.co.uk
Reviewed-by: Michel Thierry &lt;michel.thierry@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Move the scheduler feature bits into the purview of the engines</title>
<updated>2018-02-08T07:30:11Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2018-02-07T21:05:43Z</published>
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<id>urn:sha1:3fed180812edebac7d04b94a69da33b4f8532907</id>
<content type='text'>
Rather than having the high level ioctl interface guess the underlying
implementation details, having the implementation declare what
capabilities it exports. We define an intel_driver_caps, similar to the
intel_device_info, which instead of trying to describe the HW gives
details on what the driver itself supports. This is then populated by
the engine backend for the new scheduler capability field for use
elsewhere.

v2: Use caps.scheduler for validating CONTEXT_PARAM_SET_PRIORITY (Mika)
    One less assumption of engine[RCS] \o/

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Reviewed-by: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Reviewed-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180207210544.26351-2-chris@chris-wilson.co.uk
Reviewed-by: Michel Thierry &lt;michel.thierry@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Allow fence allocations to fail</title>
<updated>2017-12-13T13:17:44Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2017-12-12T18:06:51Z</published>
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<id>urn:sha1:2abe2f844645402e5d47012a04839d1c5cbffd0d</id>
<content type='text'>
If a fence allocation fails in a blocking context, we will sleep on the
fence as a last resort. We can therefore allow ourselves to fail and
sleep on the fence instead of triggering a system-wide oom. This allows
us to throttle malicious clients that are consuming lots of system
resources by capping the amount of memory used by fences.

Testcase: igt/gem_shrink/execbufX
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20171212180652.22061-2-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915/guc: Introduce USES_GUC_xxx helper macros</title>
<updated>2017-12-06T14:41:49Z</updated>
<author>
<name>Michal Wajdeczko</name>
<email>michal.wajdeczko@intel.com</email>
</author>
<published>2017-12-06T13:53:12Z</published>
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<id>urn:sha1:93ffbe8e9dc744f25cbdb941543030ab8de1d8f5</id>
<content type='text'>
In the upcoming patch we will change the way how to recognize
when GuC is in use. Using helper macros will minimize scope
of that changes. While here, update dev_info message.

Signed-off-by: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Sagar Arun Kamble &lt;sagar.a.kamble@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20171206135316.32556-3-michal.wajdeczko@intel.com
</content>
</entry>
<entry>
<title>drm/i915: Flush everything on switching to the kernel_context</title>
<updated>2017-11-27T16:37:15Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2017-11-26T21:48:56Z</published>
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<id>urn:sha1:c82297fcfaff2862686094061772070e6763e00c</id>
<content type='text'>
Even though all rendering should have been flushed at the end of the
previous requests, add an extra flush after switching to the
kernel_context. As the switch to the kernel_context is used when idling
the gpu (e.g. suspend), having an extra layer of paranoia to ensure
everything is flushed to memory seems sensible.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20171126214856.23702-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Move mi_set_context() into the legacy ringbuffer submission</title>
<updated>2017-11-23T16:12:06Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2017-11-23T15:26:31Z</published>
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<id>urn:sha1:8911a31c813275882fdc15554235a914e678759e</id>
<content type='text'>
The legacy i915_switch_context() is only applicable to the legacy
ringbuffer submission method, so move it from the general
i915_gem_context.c to intel_ringbuffer.c (rename pending!).

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Reviewed-by: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20171123152631.31385-2-chris@chris-wilson.co.uk
</content>
</entry>
</feed>
