<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/i915/gvt/trace.h, branch linux-6.5.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.5.y</id>
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<updated>2022-04-21T11:36:56Z</updated>
<entry>
<title>drm/i915/gvt: fix trace TRACE_INCLUDE_PATH</title>
<updated>2022-04-21T11:36:56Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2022-04-13T12:25:38Z</published>
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<id>urn:sha1:de5d437ae8696ab958903ac199c56c939036e3ea</id>
<content type='text'>
TRACE_INCLUDE_PATH should be a path relative to define_trace.h, not the
file including it. (See the comment in include/trace/define_trace.h.)

Cc: Zhi Wang &lt;zhi.wang.linux@gmail.com&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Zhi Wang &lt;zhi.a.wang@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/48b772795b7ab674f609ecad53b4882c66a8262a.1649852517.git.jani.nikula@intel.com
Reviewed-by: Zhi Wang &lt;zhi.a.wang@intel.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>drm/i915/gvt: give the cmd parser cmd_info a const treatment</title>
<updated>2019-01-10T03:29:02Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2019-01-08T14:12:05Z</published>
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<id>urn:sha1:b007065a0aebfba859cecbc23271542b04784567</id>
<content type='text'>
It doesn't need to be changed, make it const. The string literals should
anyway be referred to as const data.

The following gets moved to rodata section:

0000000000000080 l     O .rodata	0000000000001c00 cmd_info

Reviewed-by: Yan Zhao &lt;yan.y.zhao@intel.com&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/gvt: scan non-privileged batch buffer for debug purpose</title>
<updated>2018-04-23T05:09:34Z</updated>
<author>
<name>Zhao Yan</name>
<email>yan.y.zhao@intel.com</email>
</author>
<published>2018-04-04T05:57:09Z</published>
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<id>urn:sha1:96bebe39b2f4533af14c509061cd2b551ca81e8d</id>
<content type='text'>
For perfomance purpose, scanning of non-privileged batch buffer is turned
off by default. But for debugging purpose, it can be turned on via debugfs.
After scanning, we submit the original non-privileged batch buffer into
hardware, so that the scanning is only a peeking window of guest submitted
commands and will not affect the execution results.

v4:
- refine debugfs print format&amp;content (zhenyu wang)
- print engine id instread of engine name to prevent potential memory leak
  in debugfs warning message. (zhenyu wang)

v3:
- change vgpu-&gt;scan_nonprivbb from type bool to u32, so it is able to
  selectively turn on/off scanning of non-privileged batch buffer on engine
  level. e.g.
  if vgpu-&gt;scan_nonprivbb=3, then it will scan non-privileged batch buffer
  on engine 0 and 1.
- in debugfs interface to set vgpu-&gt;scan_nonprivbb, print warning message
  to warn user and explicitly tell state change in kernel log (zhenyu wang)
v2:
- rebase
- update comments for start_gma_offset (henry)

Signed-off-by: Zhao Yan &lt;yan.y.zhao@intel.com&gt;
Reviewed-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Zhi Wang &lt;zhi.a.wang@intel.com&gt;
</content>
</entry>
<entry>
<title>Backmerge tag 'v4.16-rc7' into drm-next</title>
<updated>2018-03-28T04:30:41Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2018-03-28T04:30:41Z</published>
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<id>urn:sha1:2b4f44eec2be2688511c2b617d0e1b4f94c45ba4</id>
<content type='text'>
Linux 4.16-rc7

This was requested by Daniel, and things were getting
a bit hard to reconcile, most of the conflicts were
trivial though.
</content>
</entry>
<entry>
<title>drm/i915/gvt: Rework shadow page management code</title>
<updated>2018-03-06T05:19:18Z</updated>
<author>
<name>Changbin Du</name>
<email>changbin.du@intel.com</email>
</author>
<published>2018-01-30T11:19:49Z</published>
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<id>urn:sha1:44b467338094d86586d3ec351d8594a6cef0842a</id>
<content type='text'>
This is a another big one and the GVT shadow page management code is
heavily refined.

The new code only use struct intel_vgpu_ppgtt_spt to represent a vgpu
shadow page table - w/ or wo/ a guest page associated with. A pure shadow
page (no guest page associated) will be used to shadow splited 2M huge
gtt. In this case, the spt.guest_page.gfn should be a zero.

To search a existed shadow page table, we have two new interfaces:
 - intel_vgpu_find_spt_by_gfn(), find a spt by guest gfn. It must not
   be a pure spt.
 - intel_vgpu_find_spt_by_mfn, Find the spt using shadow page mfn in
   shadowed PTE.

The oos_page management is remained as what is was.

v2: Split some changes into small standalone patches.

Signed-off-by: Changbin Du &lt;changbin.du@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/gvt: Rework shadow graphic memory management code</title>
<updated>2018-03-06T05:19:13Z</updated>
<author>
<name>Changbin Du</name>
<email>changbin.du@intel.com</email>
</author>
<published>2018-01-30T11:19:40Z</published>
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<id>urn:sha1:ede9d0cfcb789b6fd86ecb71b4721a19c53956e6</id>
<content type='text'>
This is a big one and the GVT shadow graphic memory management code is
heavily refined. The new code is more straightforward with less code.

The struct intel_vgpu_mm is restructured to be clearly defined, use
accurate names and some of the original fields are removed which are
really redundant.

Now we only manage ppgtt mm object with mm-&gt;ppgtt_mm.lru_list. No need
to mix ppgtt and ggtt together, since one vGPU only has one ggtt object.

v4: Don't invoke ppgtt_free_all_shadow_page before intel_vgpu_destroy_all_ppgtt_mm.
v3: Add GVT_RING_CTX_NR_PDPS to avoid confusing about the PDPs.
v2: Split some changes into small standalone patches.

Signed-off-by: Changbin Du &lt;changbin.du@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/gvt: fix one typo of render_mmio trace</title>
<updated>2018-02-14T02:35:00Z</updated>
<author>
<name>Weinan Li</name>
<email>weinan.z.li@intel.com</email>
</author>
<published>2018-02-12T07:28:42Z</published>
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<id>urn:sha1:3cc7644e4af179e79153b1fd60f9dd937ee32684</id>
<content type='text'>
Fix one typo of render_mmio trace, exchange the mmio value of old and new.

Signed-off-by: Weinan Li &lt;weinan.z.li@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/gvt: refine trace_render_mmio</title>
<updated>2017-12-18T08:30:03Z</updated>
<author>
<name>Weinan Li</name>
<email>weinan.z.li@intel.com</email>
</author>
<published>2017-12-13T02:46:59Z</published>
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<id>urn:sha1:dc5718f47cda438f47420591f4ac7338d7964bce</id>
<content type='text'>
Refine trace_render_mmio to show the vm id before and after vgpu switch,
tag host id as '0', this patch will be used in the future patch for refine
mocs switch policy.

Signed-off-by: Weinan Li &lt;weinan.z.li@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/gvt: Change flood gvt dmesg into trace</title>
<updated>2017-06-08T05:59:16Z</updated>
<author>
<name>Xiong Zhang</name>
<email>xiong.y.zhang@intel.com</email>
</author>
<published>2017-05-22T21:38:08Z</published>
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<id>urn:sha1:7fb6a7d65292a524256ed6e2d0e94071b0c53936</id>
<content type='text'>
Currently gvt dmesg is so heavy at drm.debug=0x2 that guest and
host almost couldn't run on xengt.

This patch transfer these repeated messages into trace, so dmesg
is light at drm.debug=0x2, and user could get the target message through
trace event and trace filter.

Suggested-by: Zhi Wang &lt;zhi.a.wang@intel.com&gt;
Signed-off-by: Xiong Zhang &lt;xiong.y.zhang@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/gvt: rewrite the trace gvt:gvt_command using trace style approach</title>
<updated>2017-06-08T05:59:14Z</updated>
<author>
<name>Changbin Du</name>
<email>changbin.du@intel.com</email>
</author>
<published>2017-05-03T01:20:10Z</published>
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<id>urn:sha1:ffc197763e636b928963c5dd9a3eaea8146345e3</id>
<content type='text'>
The gvt:gvt_command trace involve unnecessary overhead even this trace is
not enabled. We need improve it.

The kernel trace infrastructure provide a full api to define a trace event.
We should leverage them if possible. And one important thing is that a trace
point should store raw data but not format string.

This patch include two part work:
1) Refactor the gvt_command trace definition, including:
  o only store raw trace data.
  o use __dynamic_array() to declare a variable size buffer.
  o use __print_array() to format raw cmd data.
  o rename vm_id as vgpu_id.

2) Improve the trace invoking, including:
  o remove the cycles calculation for handler. We can get this data
    by any perf tool.
  o do not make a backup for raw cmd data which just doesn't make sense.

With this patch, this trace has no overhead if it is not enabled. And we are
trace style now.

The final output example:
  gvt workload 0-211   [000] ...1   120.555964: gvt_command: vgpu1 ring 0: buf_type 0, ip_gma e161e880, raw cmd {0x4000000}
  gvt workload 0-211   [000] ...1   120.556014: gvt_command: vgpu1 ring 0: buf_type 0, ip_gma e161e884, raw cmd {0x7a000004,0x1004000,0xe1511018,0x0,0x7d,0x0}
  gvt workload 0-211   [000] ...1   120.556062: gvt_command: vgpu1 ring 0: buf_type 0, ip_gma e161e89c, raw cmd {0x7a000004,0x140000,0x0,0x0,0x0,0x0}
  gvt workload 0-211   [000] ...1   120.556110: gvt_command: vgpu1 ring 0: buf_type 0, ip_gma e161e8b4, raw cmd {0x10400002,0xe1511018,0x0,0x7d}

Signed-off-by: Changbin Du &lt;changbin.du@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
</entry>
</feed>
