kernel/drivers/gpu/drm/i915/display/intel_dp.h, branch linux-rolling-stable

drm/i915/dp: Add helper to get min sdp guardband

2025-10-18T02:11:20Z

Add a helper to compute vblank time needed for transmitting specific DisplayPort SDPs like PPS, GAMUT_METADATA, and VSC_EXT. Latency is based on line count per packet type. This will be used to ensure adequate guardband when features like DSC/HDR are enabled. v2: Correct the lines required for PPS SDP. (Jouni) Bspec: 70151 Signed-off-by: Ankit Nautiyal Reviewed-by: Jouni Högander Link: https://lore.kernel.org/r/20251017123504.2247954-3-ankit.k.nautiyal@intel.com

drm/i915/dp: Export helper to determine if FEC on non-UHBR links is required

2025-10-17T18:48:34Z

Export the helper function to determine if FEC is required on a non-UHBR (8b10b) SST or MST link. A follow up change will take this into use for MST as well. While at it determine the output type from the CRTC state, which allows dropping the intel_dp argument. Also make the function return the required FEC state, instead of setting this in the CRTC state, which allows only querying this requirement, without changing the state. Also rename the function to intel_dp_needs_8b10b_fec(), to clarify that the function determines if FEC is required on an 8b10b link (on 128b132b links FEC is always enabled by the HW implicitly, so the function will return false for that case). Signed-off-by: Imre Deak Reviewed-by: Jouni Högander Link: https://lore.kernel.org/r/20251015161934.262108-4-imre.deak@intel.com

drm/i915/display: Introduce dp/psr_compute_config_late()

2025-10-16T13:57:39Z

Introduce intel_dp_compute_config_late() to handle late-stage configuration checks for DP/eDP features. For now, it paves path for psr_compute_config_late() to handle psr parameters that need to be computed late. Move the handling of psr_flag for Wa_18037818876 and setting of non-psr pipes to intel_psr_compute_config_late() as these are the last things to be configured for PSR features. v2: Update dp_compute_config_late() to return int. Signed-off-by: Ankit Nautiyal Reviewed-by: Jouni Högander (#v1) Link: https://lore.kernel.org/r/20251016055415.2101347-8-ankit.k.nautiyal@intel.com

drm/i915/dp: Pass DPCD device descriptor to intel_dp_get_dsc_sink_cap()

2025-10-02T15:51:36Z

Pass the DPCD sink/branch device descriptor along with the is_branch/sink flag to intel_dp_get_dsc_sink_cap(). These will be used by a follow up change to read out the branch device's DSC overall throughput/line width capabilities and to detect a throughput/link-bpp quirk. Reported-and-tested-by: Swati Sharma Reviewed-by: Ville Syrjälä Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250930182450.563016-5-imre.deak@intel.com

drm/i915/dp: Set min_bpp limit to 30 in HDR mode

2025-08-19T06:32:40Z

Update intel_dp_compute_config_limits() to use a minimum of 30 bits per pixel when the connector is in HDR mode (specifically, when EOTF is SMPTE ST2084), aligning with HDR display requirements. To support this, the function now takes a drm_connector_state instead of an intel_connector, and the required updates are made in all call sites, including MST handling. This ensures sufficient bitdepth for HDR content to avoid banding. If the required bandwidth for 30 bpp cannot be supported, the driver will either fall back to DSC or reject the mode during atomic check if DSC is not supported. Signed-off-by: Chaitanya Kumar Borah Reviewed-by: Uma Shankar Signed-off-by: Suraj Kandpal Link: https://lore.kernel.org/r/20250730055523.2214966-3-chaitanya.kumar.borah@intel.com

drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse

2025-08-19T06:32:38Z

The intel_dp_in_hdr_mode() helper was previously defined in intel_dp_aux_backlight.c but is generally useful beyond that context. Move the function to intel_dp.c and declare it in intel_dp.h to make it accessible to other DP-related code paths that need to check HDR metadata state. This is a pure refactor with no functional change and prepares for a follow-up patch that uses this helper. Signed-off-by: Chaitanya Kumar Borah Reviewed-by: Uma Shankar Signed-off-by: Suraj Kandpal Link: https://lore.kernel.org/r/20250730055523.2214966-2-chaitanya.kumar.borah@intel.com

drm/i915/dp: Disable the AUX DPCD probe quirk if it's not required

2025-06-12T17:44:15Z

Reading DPCD registers has side-effects and some of these can cause a problem for instance during link training. Based on this it's better to avoid the probing quirk done before each DPCD register read, limiting this to the monitor which requires it. The only known problematic monitor is an external SST sink, so keep the quirk disabled always for eDP and MST sinks. Reenable the quirk after a hotplug event and after resuming from a power state without hotplug support, until the subsequent EDID based detection. v2: Add a helper for determining the need/setting the probing. (Jani) Cc: Ville Syrjälä Cc: Jani Nikula Reviewed-by: Mika Kahola Acked-by: Jani Nikula Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250609125556.109538-2-imre.deak@intel.com

drm/i915/dp_mst: Enable fractional link bpps on MST if the bpp is forced

2025-05-12T12:22:53Z

Enable using a fractional (compressed) link bpp on MST links, if this is supported and the link bpp is forced. Fractional link bpps will be enabled by default as a follow-up change after testing this functionality within a set of commonly used MST monitors and docks/hubs which support it. Reviewed-by: Ankit Nautiyal Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250509180340.554867-13-imre.deak@intel.com

drm/i915/dp: Export intel_dp_dsc_min_src_compressed_bpp()

2025-05-12T12:22:51Z

Export the function that can be used by a follow-up change to query the minimum compressed link bpp supported by the HW. Reviewed-by: Ankit Nautiyal Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250509180340.554867-11-imre.deak@intel.com

drm/i915/dp_mst: Simplify computing the min/max compressed bpp limits

2025-05-12T12:22:48Z

Adjusting the compressed bpp range min/max limits in intel_dp_dsc_nearest_valid_bpp() is unnecessary: - The source/sink min/max values are enforced already by the link_config_limits::min_bpp_x16/max_bpp_x16 values computed early in intel_dp_compute_config_link_bpp_limits(). - The fixed set of valid bpps are enforced already - for all bpps in the min .. max range by intel_dp_dsc_valid_compressed_bpp() called from intel_dp_mtp_tu_compute_config(). The only thing needed is limiting max compressed bpp below the uncompressed pipe bpp, do that one thing only instead of calling intel_dp_dsc_nearest_valid_bpp(). Reviewed-by: Luca Coelho Reviewed-by: Ankit Nautiyal Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250509180340.554867-7-imre.deak@intel.com