kernel/drivers/gpu/drm/i915/display/i9xx_plane.c, branch linux-rolling-stable

drm/i915: Nuke intel_plane_config.tiling

2025-11-12T20:58:59Z

Use intel_fb_modifier_to_tiling() to convert the modifier into the fence tiling mode during BIOS FB readout, rather than hand rolling it. With this we can also stop tracking the tiling mode in the intel_plane_config. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20251107181126.5743-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915: Populate fb->format accurately in BIOS FB readout

2025-11-12T20:58:46Z

Use drm_get_format_info() instead of drm_format_info() to populate fb->format during the BIOS FB readout. The difference being that drm_get_format_info() knows about compressed formats whereas drm_format_info() doesn't. This doesn't actually matter in practice since the BIOS FB should never be compressed, but no reason we shouldn't use the more accurate function here anyway. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20251107181126.5743-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915: Pass drm_format_info into plane->max_stride()

2025-11-12T20:57:56Z

Pass the format info into plane->max_stride() from the caller instead of doing yet another drm_format_info() lookup on the spot. drm_format_info() is both rather expensive, and technically incorrect since it doesn't return the correct format info for compressed formats (though that doesn't actually matter for the current .max_stride() implementations since they are just interested in the cpp value). Most callers already have the format info available. The only exception is intel_dumb_fb_max_stride() where we shall use the actually correct drm_get_format_info() variant. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20251107181126.5743-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/display: switch to intel_display_utils.h

2025-10-31T11:22:52Z

The remaining utils display needs from i915_utils.h are primarily MISSING_CASE() and fetch_and_zero(), with a couple of i915_inject_probe_failure() uses. To avoid excessive churn, add duplicates of MISSING_CASE() and fetch_and_zero() to intel_display_utils.h, and switch display to use the display utils. As long as there are display files that include i915_drv.h, which includes i915_utils.h, we'll need #ifndef guards for MISSING_CASE() and fetch_and_zero() in both utils headers. We can remove them once display no longer depends on i915_drv.h. A couple of files in display still need i915_utils.h for i915_inject_probe_failure(). Annotate this. They will be handled separately. Reviewed-by: Luca Coelho Link: https://patch.msgid.link/79f9e31ca64c8c045834d48e20ceb0c515d1e9e1.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/{i915,xe}/panic: split out intel_panic.[ch]

2025-09-08T11:23:46Z

intel_bo.[ch] is not the appropriate location for the panic functionality. Split out intel_panic.[ch] and xe_panic.c in i915 and xe. Keep the function names for now. Cc: Jocelyn Falempe Cc: Maarten Lankhorst Signed-off-by: Jani Nikula Reviewed-by: Jocelyn Falempe Link: https://lore.kernel.org/r/d98b831a011a028ffd33ce99b0ba62be061ee235.1756835342.git.jani.nikula@intel.com

drm/i915/fb: add intel_framebuffer_alloc()

2025-09-08T11:23:46Z

Add intel_framebuffer_alloc() to hide intel_bo_alloc_framebuffer(), as that doesn't feel like the correct abstraction. Cc: Jocelyn Falempe Cc: Maarten Lankhorst Signed-off-by: Jani Nikula Reviewed-by: Jocelyn Falempe Link: https://lore.kernel.org/r/379c306c692c50f6af3b6f2488c213f12627954f.1756835342.git.jani.nikula@intel.com

drm/i915: Don't pass crtc_state to foo_plane_ctl() & co.

2025-07-19T17:55:38Z

The *_plane_ctl() functions only consider the state of the plane (the state of the crtc is handled by the corresponding *_plane_ctl_crtc()), and thus they don't need the crtc_state at all. Don't pass it in. Reviewed-by: Jani Nikula Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250717171353.23090-7-ville.syrjala@linux.intel.com

drm/i915: Precompute plane SURF address

2025-07-19T17:55:07Z

Currently we pre-compute the plane surface/base address partially (only for cursor_needs_physical cases) in intel_plane_pin_fb() and finish the calculation in the plane->update_arm(). Let's just precompute the whole thing instead. One benefit is that we get rid of all the vma offset stuff from the low level plane code. Another use I have in mind is including the surface address in the plane tracepoints, which should make it easier to analyze display faults. v2: Deal with xe reuse_vma() hacks v3: use intel_plane_ggtt_offset() still in reuse_vma() Reviewed-by: Jani Nikula Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250717203216.31258-1-ville.syrjala@linux.intel.com

drm/i915: Add intel_bo_alloc_framebuffer()

2025-06-27T09:48:22Z

Encapsulate the struct intel_framebuffer into an xe_framebuffer or i915_framebuffer, and allow to add specific fields for each variant for the panic use-case. This is particularly needed to have a struct xe_res_cursor available to support drm panic on discrete GPU. Signed-off-by: Jocelyn Falempe Link: https://lore.kernel.org/r/20250624091501.257661-7-jfalempe@redhat.com Signed-off-by: Maarten Lankhorst

drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes

2025-06-27T09:48:22Z

drm_panic draws in linear framebuffer, so it's easier to re-use the current framebuffer, and disable tiling in the panic handler, to show the panic screen. This assumes that the alignment restriction is always smaller in linear than in tiled. It also assumes that the linear framebuffer size is always smaller than the tiled. Signed-off-by: Jocelyn Falempe Link: https://lore.kernel.org/r/20250624091501.257661-4-jfalempe@redhat.com Signed-off-by: Maarten Lankhorst