kernel/drivers/gpu/drm/i915/display/g4x_dp.c, branch linux-rolling-stable

drm/i915/display: switch to intel_display_utils.h

2025-10-31T11:22:52Z

The remaining utils display needs from i915_utils.h are primarily MISSING_CASE() and fetch_and_zero(), with a couple of i915_inject_probe_failure() uses. To avoid excessive churn, add duplicates of MISSING_CASE() and fetch_and_zero() to intel_display_utils.h, and switch display to use the display utils. As long as there are display files that include i915_drv.h, which includes i915_utils.h, we'll need #ifndef guards for MISSING_CASE() and fetch_and_zero() in both utils headers. We can remove them once display no longer depends on i915_drv.h. A couple of files in display still need i915_utils.h for i915_inject_probe_failure(). Annotate this. They will be handled separately. Reviewed-by: Luca Coelho Link: https://patch.msgid.link/79f9e31ca64c8c045834d48e20ceb0c515d1e9e1.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/display: add intel_dig_port_alloc()

2025-08-12T18:23:38Z

Add a common allocator function for struct intel_digital_port, with some member default initialization to deduplicate them from everywhere else. This is similar to intel_connector_alloc(). At least for now, place this in intel_encoder.[ch]. We don't have a dedicated file for dig port stuff, and there wouldn't be much to add there anyway. A digital port is a sort of subclass of encoder, so the location isn't far off the mark. Reviewed-by: Dibin Moolakadan Subrahmanian Link: https://lore.kernel.org/r/4d2da1a40698f85014140f586405b19795437e81.1753787803.git.jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/dp: Implement .set_idle_link_train() for everyone

2025-07-17T16:42:12Z

All platforms are capable of explicitly transmitting the idle pattern. Implement it for everyone (so far it as implemented only for HSW+). The immediate benefit is that we gain the possibility of implementing the POST_LT_ADJ_REQ sequence for all platforms. Another potential future use would be a pseudo port sync mode on pre-BDW where we attempt to sync up multiple ports/pipes by trying to turn on the transcoders at the same time, and switching the links to normal pixel transmission at the same time. I'm not 100% sure the hardware is guaranteed to transmit the required number of idle patterns (5) when switching away from training pattern (either via explicit idle pattern, or straight to the normal pixel output). Would be nice to confirm that at some point, but for now let's assume it happens correctly in both cases. v2: Elaborate a bit more on the min required idle patterns Tested-by: Imre Deak Reviewed-by: Imre Deak Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250710201718.25310-7-ville.syrjala@linux.intel.com

drm/i915/dp: Don't switch to idle pattern before disable on pre-hsw

2025-07-17T16:41:24Z

For some reason we are switching over to the idle pattern before disabling the DP port on pre-hsw. AFAICS this has never been part of the documented sequence (and on hsw+ the spec explicitly says not to do this). Get rid of it. The code goes all the way back to commit 5eb08b69f510 ("drm/i915: enable DisplayPort support on IGDNG"), and it was accompanied by a 17ms delay which got changed to vbl wait in commit ab527efc2fea ("drm/i915: use wait_for_vblank instead of msleep(17)"), and was later completely removed in commit 93c9c19b3d25 ("drm/i915: remove unexplained vblank wait in the DP off code"). Smoke tested on g4x/snb/chv. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250710201718.25310-3-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak

drm/i915: split out display register macros to a separate file

2025-06-09T10:25:10Z

This is a scripted split of the display related register macros from i915_reg.h to display/intel_display_regs.h. As a starting point, move all the macros that are only used in display code (or GVT). If there are users in core i915 code or soc/, or no users anywhere, keep the macros in i915_reg.h. This is done in groups of macros separated by blank lines, moving the comments along with the groups. Some manually picked macro groups are kept/moved regardless of the heuristics above. This is obviously a very crude approach. It's not perfect. But there are 4.2k lines in i915_reg.h, and its refactoring has ground to a halt. This is the big hammer that splits the file to two, and enables further cleanup. Cc: Suraj Kandpal Cc: Ville Syrjälä Cc: Lucas De Marchi Reviewed-by: Suraj Kandpal # v2 Reviewed-by: Lucas De Marchi Link: https://lore.kernel.org/r/20250606102256.2080073-1-jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/reg: use REG_BIT and friends to define DP registers

2025-04-24T07:33:52Z

Define the DP register contents using the REG_BIT, REG_GENMASK, etc. macros. Ditch the unhelpful comments. Rename eDP related register content macros to have EDP_ prefix. Reviewed-by: Suraj Kandpal Link: https://lore.kernel.org/r/20250423100213.720585-1-jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/display: drop lots of unnecessary #include i915_drv.h

2025-04-22T12:46:29Z

With the PCH macros switched to use struct intel_display, we have a number of files that no longer need struct drm_i915_private or anything else from i915_drv.h anymore. Remove the #include, and add the missing includes that were previously implicit. v2: Drop even more of the includes Reviewed-by: Chaitanya Kumar Borah Link: https://lore.kernel.org/r/5dc9e6a98461c344febac4c645875d8688eba906.1744880985.git.jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/display: pass struct intel_display to PCH macros

2025-04-22T12:46:29Z

Now that INTEL_PCH_TYPE() and HAS_PCH_*() macros are under display, and accept a struct intel_display pointer, use that instead of struct drm_i915_private pointer in display code. This is done naively by running: $ sed -i 's/$INTEL_PCH_TYPE\|HAS_PCH_[A-Z0-9_-]*$([^)]*)/\1(display)/g' \ $(find drivers/gpu/drm/i915/display -name "*.c") and fixing the fallout, i.e. removing unused local i915 variables and adding display variables where needed. v2: Rebase Reviewed-by: Chaitanya Kumar Borah Link: https://lore.kernel.org/r/999f4d7b8ed11739b1c5ec8d6408fc39d5e3776b.1744880985.git.jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/dpio: have chv_data_lane_soft_reset() get/put dpio internally

2025-04-14T17:40:28Z

Have chv_data_lane_soft_reset() get/put dpio internally, and use a locked version of it within intel_dpio_phy.c. This drops the dependency on vlv sideband from g4x_dp.c and g4x_hdmi.c, and makes that a DPIO PHY implementation detail. Reviewed-by: Ville Syrjälä Link: https://lore.kernel.org/r/20250411102715.613082-1-jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/dp: Rename intel_dp::link_trained to link.active

2025-04-07T13:24:59Z

The intel_dp::link_trained flag indicates whether the link is active, regardless of whether the link training passed or failed. For clarity rename the flag to 'active'. While at it move the flag under intel_dp::link. Suggested-by: Jani Nikula Reviewed-by: Jani Nikula Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250404150310.1156696-2-imre.deak@intel.com