<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/powerplay/inc, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2018-04-19T15:25:06Z</updated>
<entry>
<title>drm/amd/powerplay: header file interface to SMU update</title>
<updated>2018-04-19T15:25:06Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2018-04-17T13:49:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cc9e992dfb5bb48f59f3fbc1268d3f38d2c86ef3'/>
<id>urn:sha1:cc9e992dfb5bb48f59f3fbc1268d3f38d2c86ef3</id>
<content type='text'>
update vega12 smu interface.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: Enable ACG SS feature</title>
<updated>2018-04-03T18:08:43Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2018-03-28T09:58:03Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5d41535c5d66b0a9ad2b7d5d1a72025cbca13ed2'/>
<id>urn:sha1:5d41535c5d66b0a9ad2b7d5d1a72025cbca13ed2</id>
<content type='text'>
Port the atomfirmware.h and populates the
updated pptable to SMU.With the new parameters
in the new pptable, the ACG SS feature is enabled.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: clean header file hwmgr.h</title>
<updated>2018-03-23T14:42:42Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-22T06:38:37Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=09695ad78f1f5f315c7e9c5090f0c7b846a43690'/>
<id>urn:sha1:09695ad78f1f5f315c7e9c5090f0c7b846a43690</id>
<content type='text'>
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: Refine register_thermal_interrupt function</title>
<updated>2018-03-21T19:36:58Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-21T05:11:27Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4d2003721c2bd6add6746426eec1d879432c92dd'/>
<id>urn:sha1:4d2003721c2bd6add6746426eec1d879432c92dd</id>
<content type='text'>
v2: add Vega12 support

1. delete useless argument in function register_thermal_interrupt
2. rename function name register_thermal_interrupt to register_irq_handlers

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Remove wrapper layer of cgs irq handling</title>
<updated>2018-03-21T19:36:58Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-20T11:19:44Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=160b8e75932fd51a49607d32dbfa1d417977b79c'/>
<id>urn:sha1:160b8e75932fd51a49607d32dbfa1d417977b79c</id>
<content type='text'>
v2: add Vega12 support

1. remove struct cgs_os_ops
2. delete cgs_linux.h
3. refine the irq code for vega10, can fix set pp table
   failed issue.
4. add common smu irq process function

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: add the hw manager for vega12 (v4)</title>
<updated>2018-03-21T19:36:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2018-03-19T19:23:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2cac05dee6e309bb21424c7d59c62f662d01309e'/>
<id>urn:sha1:2cac05dee6e309bb21424c7d59c62f662d01309e</id>
<content type='text'>
handles the driver power state setup

v2: squash in the following:
- handle negative temperature ranges
- add vega12 thermal ranges
- use ffs/fls
- remove ACG code
- resend NumOfDisplays message
- correct max dpm levels
- remove power containment settings
- fix warnings
- add sensors interface
- delete unused overdrive arbiter
- drop get_temperature callback
- smu table cleanup
- atomfirmware smu dpm table updates
v3: rebase
v4: rebase

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: add vega12_ppsmc.h</title>
<updated>2018-03-21T19:36:54Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2017-12-25T02:17:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=c4a4f4b6cbd8e058c5647d0a58c954ac8ecebe37'/>
<id>urn:sha1:c4a4f4b6cbd8e058c5647d0a58c954ac8ecebe37</id>
<content type='text'>
Defines the smc message interface with the driver.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: add new smu9_driver_if.h for vega12 (v2)</title>
<updated>2018-03-21T19:36:54Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2017-12-25T02:17:04Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=97ea8ebe49711f22692b710d6092654f93297c3c'/>
<id>urn:sha1:97ea8ebe49711f22692b710d6092654f93297c3c</id>
<content type='text'>
Add driver firmware interface header.

v2: squash in interface updates.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: Move functions to smu backend table for vega10</title>
<updated>2018-03-19T18:35:30Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-16T07:16:10Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3f9ca14a1d5d566ecc23718c1782cd9fa3713fc1'/>
<id>urn:sha1:3f9ca14a1d5d566ecc23718c1782cd9fa3713fc1</id>
<content type='text'>
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: Remove dead header file pp_asicblocks.h</title>
<updated>2018-03-15T14:58:16Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-13T07:35:17Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bcd8377b6f9810329ad958378a56c7ba0febf7f8'/>
<id>urn:sha1:bcd8377b6f9810329ad958378a56c7ba0febf7f8</id>
<content type='text'>
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
