kernel/drivers/gpu/drm/amd/powerplay/hwmgr, branch linux-4.17.y

drm/amd/powerplay: correct vega12 thermal support as true

2018-08-24T11:06:53Z

[ Upstream commit 363a3d3fb7d478d7dd49b8c6294436b8ba5984cc ] Thermal support is enabled on vega12. Signed-off-by: Evan Quan Acked-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman

drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD (v2)

2018-08-03T05:47:33Z

[ Upstream commit 5c16f36f6f003b4415237acca59384a074cd8030 ] Fix the issue that SCLK&MCLK can't be set higher than dpm7 when OD is enabled in SMU7. v2: fix warning (Alex) Signed-off-by: Kenneth Feng Acked-by: Rex Zhu Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman

drm/amd/pp: Fix performance drop on Fiji

2018-05-10T13:25:22Z

The performance drop if the default TDP more than 256 Watt Reviewed-by: Alex Deucher Reviewed-by: Junwei Zhang Signed-off-by: Rex Zhu Signed-off-by: Alex Deucher

drm/amd/pp: Refine the output of pp_power_profile_mode on VI

2018-05-09T20:17:39Z

In order to keep consist with Vega, the output format of the pp_power_profile_mode would be < “*” for current profile>:"detail settings" and remove the "CURRENT" mode line. for example: NUM MODE_NAME SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL 0 3D_FULL_SCREEN: 0 100 30 0 100 10 1 POWER_SAVING: 10 0 30 - - - 2 VIDEO: - - - 10 16 31 3 VR: 0 11 50 0 100 10 4 COMPUTE: 0 5 30 - - - 5 CUSTOM *: 0 5 30 0 100 10 NUM MODE_NAME SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL 0 3D_FULL_SCREEN: 0 100 30 0 100 10 1 POWER_SAVING *: 10 0 30 0 100 10 2 VIDEO: - - - 10 16 31 3 VR: 0 11 50 0 100 10 4 COMPUTE: 0 5 30 - - - 5 CUSTOM: - - - - - - Reviewed-by: Evan Quan Acked-by: Alex Deucher Signed-off-by: Rex Zhu Signed-off-by: Alex Deucher

drm/amd/pp: Fix bug voltage can't be OD separately on VI

2018-04-19T15:20:10Z

Make sure to update the MCLK and SCLK flags when setting the VDDC flags due to dependencies. Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu Signed-off-by: Alex Deucher

drm/amd/powerply: fix power reading on Fiji

2018-04-03T18:08:44Z

Power value is wrong reported by customer. It is a regression by commit a7c7bc4c0c47eaac77b8fa92f0672032df7f4254 Author: Rex Zhu Date: Mon Mar 27 15:32:59 2017 +0800 drm/amd/powerplay: reduce sample period time for power readings. Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher The theoretical sampling period is from 50ms to 4sec, original 2sec is long but correct, and 20ms is too short. change it to more reasonable 200ms. Signed-off-by: Eric Huang Acked-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amd/powerplay: Enable ACG SS feature

2018-04-03T18:08:43Z

Port the atomfirmware.h and populates the updated pptable to SMU.With the new parameters in the new pptable, the ACG SS feature is enabled. Signed-off-by: Kenneth Feng Reviewed-by: Evan Quan Signed-off-by: Alex Deucher

drm/amd/pp: Remove Dead functions on Vega12

2018-04-03T17:52:57Z

Remove Vega12 DIDT config functions. Reviewed-by: Huang Rui Acked-by: Christian König Signed-off-by: Rex Zhu Signed-off-by: Alex Deucher

drm/amd/pp: silence a static checker warning

2018-04-03T17:52:57Z

This has a static checker warning because "frev" and "crev" can be uninitialized if "info" is NULL. I just changed the order of the checks so that we check "info" first. Reviewed-by: Rex Zhu Reviewed-by: Huang Rui Signed-off-by: Dan Carpenter Signed-off-by: Alex Deucher

drm/amd/pp: clean header file hwmgr.h

2018-03-23T14:42:42Z

Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu Signed-off-by: Alex Deucher