<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/pm/powerplay, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2025-11-24T17:36:12Z</updated>
<entry>
<title>drm/amd/pm: adjust the visibility of pp_table sysfs node</title>
<updated>2025-11-24T17:36:12Z</updated>
<author>
<name>Yang Wang</name>
<email>kevinyang.wang@amd.com</email>
</author>
<published>2025-10-30T01:06:22Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5de8ce0f3709ad93ca5a579aa45cf1b52d72bc90'/>
<id>urn:sha1:5de8ce0f3709ad93ca5a579aa45cf1b52d72bc90</id>
<content type='text'>
v1:
- make pp_table invisible on VF mode (only valid on BM)
- make pp_table invisible on Mi* chips (Not supported)
- make pp_table invisible if scpm feature is enabled.

v2:
move pp_table invisible code logic into amdgpu_dpm_get_pp_table() function.

v3:
add table buffer pointer check both on powerplay &amp; swsmu.

Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Remove invalidate and flush hdp macros</title>
<updated>2025-11-04T16:33:54Z</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2025-10-28T14:08:28Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d80391dd037af032a38e36a9f9d366b7afd195b4'/>
<id>urn:sha1:d80391dd037af032a38e36a9f9d366b7afd195b4</id>
<content type='text'>
Remove amdgpu_asic_flush_hdp &amp; amdgpu_asic_invalidate_hdp functions and
directly use the mapped ones

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm/powerplay/smumgr: Fix PCIeBootLinkLevel value on Iceland</title>
<updated>2025-10-28T13:50:31Z</updated>
<author>
<name>John Smith</name>
<email>itistotalbotnet@gmail.com</email>
</author>
<published>2025-10-21T09:09:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=92b0a6ae6672857ddeabf892223943d2f0e06c97'/>
<id>urn:sha1:92b0a6ae6672857ddeabf892223943d2f0e06c97</id>
<content type='text'>
Previously this was initialized with zero which represented PCIe Gen
1.0 instead of using the
maximum value from the speed table which is the behaviour of all other
smumgr implementations.

Fixes: 18aafc59b106 ("drm/amd/powerplay: implement fw related smu interface for iceland.")
Signed-off-by: John Smith &lt;itistotalbotnet@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm/powerplay/smumgr: Fix PCIeBootLinkLevel value on Fiji</title>
<updated>2025-10-28T13:49:58Z</updated>
<author>
<name>John Smith</name>
<email>itistotalbotnet@gmail.com</email>
</author>
<published>2025-10-21T09:08:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=c52238c9fb414555c68340cd80e487d982c1921c'/>
<id>urn:sha1:c52238c9fb414555c68340cd80e487d982c1921c</id>
<content type='text'>
Previously this was initialized with zero which represented PCIe Gen
1.0 instead of using the
maximum value from the speed table which is the behaviour of all other
smumgr implementations.

Fixes: 18edef19ea44 ("drm/amd/powerplay: implement fw image related smu interface for Fiji.")
Signed-off-by: John Smith &lt;itistotalbotnet@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Stop overloading power limit with limit type</title>
<updated>2025-10-13T18:14:35Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2025-10-09T20:59:04Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5f4f49a41c14890c05faa99881e98cc156ba7e03'/>
<id>urn:sha1:5f4f49a41c14890c05faa99881e98cc156ba7e03</id>
<content type='text'>
When passed around internally the upper 8 bits of power limit include
the limit type. This is non-obvious without digging into the nuances
of each function. Instead pass the limit type as an argument to all
applicable layers.

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Remove some unncessary header includes</title>
<updated>2025-10-13T18:14:33Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2025-10-01T18:03:33Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=861fc60b172d8edc7ac867bbce628488a69abd0d'/>
<id>urn:sha1:861fc60b172d8edc7ac867bbce628488a69abd0d</id>
<content type='text'>
Unnecessary headers can slow down the build, drop em.

No intended functional changes.

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Tested-by: Robert Beckett &lt;bob.beckett@collabora.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: Fix CIK shutdown temperature</title>
<updated>2025-10-13T18:14:15Z</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2025-10-13T06:06:42Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6917112af2ba36c5f19075eb9f2933ffd07e55bf'/>
<id>urn:sha1:6917112af2ba36c5f19075eb9f2933ffd07e55bf</id>
<content type='text'>
Remove extra multiplication.

CIK GPUs such as Hawaii appear to use PP_TABLE_V0 in which case
the shutdown temperature is hardcoded in smu7_init_dpm_defaults
and is already multiplied by 1000. The value was mistakenly
multiplied another time by smu7_get_thermal_temperature_range.

Fixes: 4ba082572a42 ("drm/amd/powerplay: export the thermal ranges of VI asics (V2)")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1676
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: Use pm_display_cfg in legacy DPM (v2)</title>
<updated>2025-09-15T20:52:46Z</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2025-09-09T14:17:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9d73b107a61b73e7101d4b728ddac3d2c77db111'/>
<id>urn:sha1:9d73b107a61b73e7101d4b728ddac3d2c77db111</id>
<content type='text'>
This commit is necessary for DC to function well with chips
that use the legacy power management code, ie. SI and KV.
Communicate display information from DC to the legacy PM code.

Currently DC uses pm_display_cfg to communicate power management
requirements from the display code to the DPM code.
However, the legacy (non-DC) code path used different fields
and therefore could not take into account anything from DC.

Change the legacy display code to fill the same pm_display_cfg
struct as DC and use the same in the legacy DPM code.

To ease review and reduce churn, this commit does not yet
delete the now unneeded code, that is done in the next commit.

v2:
Rebase.
Fix single_display in amdgpu_dpm_pick_power_state.

Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: use int type to store negative error codes</title>
<updated>2025-09-05T21:38:40Z</updated>
<author>
<name>Qianfeng Rong</name>
<email>rongqianfeng@vivo.com</email>
</author>
<published>2025-09-04T14:58:00Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bddf30944d42e1fb7f105fad4e5f9e7e86ea871e'/>
<id>urn:sha1:bddf30944d42e1fb7f105fad4e5f9e7e86ea871e</id>
<content type='text'>
Use int instead of uint32_t for 'ret' variable to store negative error
codes or zero returned by other functions.

Storing the negative error codes in unsigned type, doesn't cause an issue
at runtime but can be confusing. Additionally, assigning negative error
codes to unsigned type may trigger a GCC warning when the -Wsign-conversion
flag is enabled.

No effect on runtime.

Signed-off-by: Qianfeng Rong &lt;rongqianfeng@vivo.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm/powerplay/smumgr: remove redundant ternary operators</title>
<updated>2025-09-05T21:38:39Z</updated>
<author>
<name>Liao Yuanhong</name>
<email>liaoyuanhong@vivo.com</email>
</author>
<published>2025-09-04T08:21:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9ab06ab36d4a84d087e995233fe10d5d9496f908'/>
<id>urn:sha1:9ab06ab36d4a84d087e995233fe10d5d9496f908</id>
<content type='text'>
For ternary operators in the form of "a ? true : false", if 'a' itself
returns a boolean result, the ternary operator can be omitted. Remove
redundant ternary operators to clean up the code. Swap variable positions
on either side of '==' to enhance readability.

Signed-off-by: Liao Yuanhong &lt;liaoyuanhong@vivo.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
