Hosts the 0x221E linux distro kernel. https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y 2019-01-25T21:15:33Z 2019-01-25T21:15:33Z Jim Qu Jim.Qu@amd.com 2018-11-08T10:32:41Z urn:sha1:6a789aa8d5f4b4a165de2fb590511f22b1e81c1e Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-01-25T21:15:33Z Jim Qu Jim.Qu@amd.com 2018-11-08T10:21:05Z urn:sha1:f5d9e9b9c15c67dc86354b606e077a5a6b6381ed Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-01-14T20:42:51Z Jim Qu Jim.Qu@amd.com 2018-11-07T02:54:18Z urn:sha1:58a50420aa681502369875213374121425428b52 Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-01-14T20:04:53Z Kent Russell kent.russell@amd.com 2019-01-07T11:02:06Z urn:sha1:a0bb79e2559c9330c82080d6e4f8c762d72ed0f1 We need these offsets for PCIE perf counters, so include them as well as the the previously-used defines from the nbio_*.c files v2: Return NBIF definitions back to previous files Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-12-05T22:49:50Z Leo Li sunpeng.li@amd.com 2018-11-22T14:39:17Z urn:sha1:d4295e12796e747f9a624a56cd54de51fb2b3bdd In particular, we need the mmMC_VM_XGMI_LFB_CNTL register, for determining if xGMI is enabled on VG20. This will be used by DC to determine the correct spread spectrum adjustment for display and audio clocks. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-10-12T17:53:52Z James Zhu James.Zhu@amd.com 2018-10-02T18:38:18Z urn:sha1:b53d3049d258fe731ebc510cd631ceffc7abfc91 Add new register offset/mask for VCN to support latest VCN implementation. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-10-10T19:47:32Z Tao Zhou tao.zhou1@amd.com 2018-10-09T03:30:36Z urn:sha1:04e7580f892688aff140c574dbefa707977375e7 Add CP_DEBUG register definition. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-10-09T21:45:58Z Evan Quan evan.quan@amd.com 2018-09-18T10:04:44Z urn:sha1:031db09017da532d4dc7bbba8c734cfc80f49f34 Manual fan RPM and pwm setting on vega20 are available now. V2: correct the register for fan speed setting and avoid divide-by-zero Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-10-09T21:45:58Z Evan Quan evan.quan@amd.com 2018-09-17T10:41:28Z urn:sha1:42fae99520090423ad639af889d7376774df7fdf Export the correct gfx voltage by hwmon interface. V2: update the register naming for consistency Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-09-27T02:09:23Z James Zhu James.Zhu@amd.com 2018-09-10T18:58:16Z urn:sha1:b604545b921b0b6af1785db85bab8e790a18ddad New register offset/mask need to be added to support VCN DPG mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>