kernel/drivers/gpu/drm/amd/include/asic_reg, branch linux-4.12.yHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.12.y2017-03-30T03:54:28Zdrm/amdgpu: add the VCE 4.0 register headers2017-03-30T03:54:28ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:43:33Zurn:sha1:f6c3947893fd1ff8a4d95cb8ccd43ce20a6d5448
These are the Video Compression Engine registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add the UVD 7.0 register headers2017-03-30T03:54:28ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:42:58Zurn:sha1:7008d577d6c90a3a6a8cd0d6fb41d469326d9077
These are the Unifed Video Decoder registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add THM 9.0 register headers2017-03-30T03:54:27ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:42:12Zurn:sha1:893f25540e698326ac696fa56b99fd6a9b285b61
These are the THerMal control registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add SMUIO 9.0 register headers2017-03-30T03:54:26ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:41:21Zurn:sha1:63d311d9b47e3652ad20c9bb045bd110cdca2182
These are the System Managment Unit IO registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add SDMA 4.0 register headers2017-03-30T03:54:26ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:40:41Zurn:sha1:456f97704f93c7f6e49084759a26872463455318
These are the System DMA register headers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add OSSSYS 4.0 register headers2017-03-30T03:54:25ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:39:12Zurn:sha1:5a8288c0f9894410da7ced14d07568752cc6a629
These are the OS Services register headers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add NBIO 6.1 register headers2017-03-30T03:54:24ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:38:26Zurn:sha1:198b746016ea6aece3454c47fefa0bf96e76104e
These are the Bus IO registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add NBIF 6.1 register headers2017-03-30T03:54:23ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:37:25Zurn:sha1:61e04478b2e10f005b78e835b134ffa805b2f389
These are the Bus InterFace registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add MP 9.0 register headers2017-03-30T03:54:23ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:36:07Zurn:sha1:3ec127a075430006cdeccb1a3effa2d4a3ac340e
MP is the system management controller on vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add the MMHUB 1.0 register headers2017-03-30T03:54:22ZAlex Deucheralexander.deucher@amd.com2017-03-02T21:34:19Zurn:sha1:68c7d1305258c8a3048d5ec14c740a1560992605
Add the MultiMedia Hub registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>