<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/display/dc/inc, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2018-03-07T21:27:48Z</updated>
<entry>
<title>drm/amd/display: fix cursor related Pstate hang</title>
<updated>2018-03-07T21:27:48Z</updated>
<author>
<name>Eric Yang</name>
<email>Eric.Yang2@amd.com</email>
</author>
<published>2018-01-19T00:07:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=39b485e4dddb9c801616cb6632ea2d4f646780a2'/>
<id>urn:sha1:39b485e4dddb9c801616cb6632ea2d4f646780a2</id>
<content type='text'>
Move cursor programming to inside the OTG_MASTER_UPDATE_LOCK

If graphics plane go from 1 pipe to hsplit, the cursor updates
after mpc programming and unlock. Which means there is a window
of time where cursor is enabled on the wrong pipe if it's on
the right side of the screen (i.e. case where cursor need to
move from pipe 0 to pipe 3 post split). This will cause pstate hang.

Solution is to program the cursor while still locked.

Signed-off-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Pass signal directly to enable_tmds_output</title>
<updated>2018-03-07T21:27:20Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2017-12-18T16:57:28Z</published>
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<id>urn:sha1:35c4c88ce8da738b1a9ade239f84dad181f2cf9f</id>
<content type='text'>
This makes the check for HDMI and dual-link DVI a bit more
straightforward.

Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update FMT and OPPBUF functions</title>
<updated>2017-12-20T19:48:47Z</updated>
<author>
<name>Eric Bernstein</name>
<email>eric.bernstein@amd.com</email>
</author>
<published>2017-12-12T19:14:10Z</published>
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<id>urn:sha1:72d520d4fa76e59d1882620fa34680ff4258ae6f</id>
<content type='text'>
Updates to FMT and OPPBUF programming from HW team
pseudocode review.

Signed-off-by: Eric Bernstein &lt;eric.bernstein@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Only blank DCN when we have set_blank implementation</title>
<updated>2017-12-20T19:48:22Z</updated>
<author>
<name>Yue Hin Lau</name>
<email>Yuehin.Lau@amd.com</email>
</author>
<published>2017-12-04T21:58:11Z</published>
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<id>urn:sha1:b51adc77e220ddc659db7c46270596717f50cf5c</id>
<content type='text'>
Also rename timing_generator to optc

Signed-off-by: Yue Hin Lau &lt;Yuehin.Lau@amd.com&gt;
Reviewed-by: Eric Bernstein &lt;Eric.Bernstein@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Put dcn_mi_registers with other structs</title>
<updated>2017-12-20T19:48:15Z</updated>
<author>
<name>Eric Bernstein</name>
<email>eric.bernstein@amd.com</email>
</author>
<published>2017-12-07T20:49:43Z</published>
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<id>urn:sha1:39f26499c6fff26dfa913863e6e6bc5359834b13</id>
<content type='text'>
Signed-off-by: Eric Bernstein &lt;eric.bernstein@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: integrating optc pseudocode</title>
<updated>2017-12-20T19:48:02Z</updated>
<author>
<name>Yue Hin Lau</name>
<email>Yuehin.Lau@amd.com</email>
</author>
<published>2017-12-07T19:43:24Z</published>
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<id>urn:sha1:4b4f8f74a8e36e6be8b13c1573c7d299c3b8cf49</id>
<content type='text'>
Signed-off-by: Yue Hin Lau &lt;Yuehin.Lau@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove dwbc from pipe_ctx</title>
<updated>2017-12-20T19:47:30Z</updated>
<author>
<name>Eric Bernstein</name>
<email>eric.bernstein@amd.com</email>
</author>
<published>2017-11-23T21:38:52Z</published>
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<id>urn:sha1:3253af353dbc5b66788b42d39a62e922a095b531</id>
<content type='text'>
Signed-off-by: Eric Bernstein &lt;eric.bernstein@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix global sync param retrieval when not pipe splitting</title>
<updated>2017-12-20T19:47:11Z</updated>
<author>
<name>Dmytro Laktyushkin</name>
<email>Dmytro.Laktyushkin@amd.com</email>
</author>
<published>2017-12-04T20:48:13Z</published>
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<id>urn:sha1:2961fef7058dcdb470621f0d58f17a6c4c0033e5</id>
<content type='text'>
Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update HUBP</title>
<updated>2017-12-20T19:47:04Z</updated>
<author>
<name>Eric Bernstein</name>
<email>eric.bernstein@amd.com</email>
</author>
<published>2017-12-05T15:51:35Z</published>
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<id>urn:sha1:36192e7e57032e08e8894189d9ec7db4ae2104ad</id>
<content type='text'>
Signed-off-by: Eric Bernstein &lt;eric.bernstein@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix check for whether dmcu fw is running</title>
<updated>2017-12-20T19:46:32Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2017-11-24T20:43:05Z</published>
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<id>urn:sha1:23bfb33181d2af0109672b5f25f542378e7a01b1</id>
<content type='text'>
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
