<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/display/dc/dce120, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2018-02-19T19:18:36Z</updated>
<entry>
<title>drm/amd/display: Add timing generator count to resource pool.</title>
<updated>2018-02-19T19:18:36Z</updated>
<author>
<name>Yongqiang Sun</name>
<email>yongqiang.sun@amd.com</email>
</author>
<published>2018-01-05T18:53:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3be1406a72b08e3122660f7ea2a41a129fe5e266'/>
<id>urn:sha1:3be1406a72b08e3122660f7ea2a41a129fe5e266</id>
<content type='text'>
Use tg count in resource pool for further reference.

Signed-off-by: Yongqiang Sun &lt;yongqiang.sun@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/dc: include new ip and ip_offset headers</title>
<updated>2018-02-19T19:18:14Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2018-01-15T07:43:23Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=407e75170fc0324ab03abf03ef5018b78d8d7cbf'/>
<id>urn:sha1:407e75170fc0324ab03abf03ef5018b78d8d7cbf</id>
<content type='text'>
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Don't allow dual-link DVI on all ASICs.</title>
<updated>2018-02-19T19:17:26Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2017-12-19T21:17:22Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7e98ab103521f82957f3c2d82d555a6803360440'/>
<id>urn:sha1:7e98ab103521f82957f3c2d82d555a6803360440</id>
<content type='text'>
Our APUs (Carrizo, Stoney, Raven) don't support it.

v2: Don't use is_apu as other ASICs might also not support it

Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>BackMerge tag 'v4.15-rc4' into drm-next</title>
<updated>2017-12-19T11:37:24Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-12-19T11:37:24Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6b7dcb536e3535444c39286333f10d06d2f44fb5'/>
<id>urn:sha1:6b7dcb536e3535444c39286333f10d06d2f44fb5</id>
<content type='text'>
Linux 4.15-rc4

Daniel requested it to fix some messy conflicts.
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 header files.</title>
<updated>2017-12-06T17:48:22Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-24T04:31:36Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fb960bd28354805a7e2a6dbdf8d8d07a5160d0cd'/>
<id>urn:sha1:fb960bd28354805a7e2a6dbdf8d8d07a5160d0cd</id>
<content type='text'>
Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 nbio header files.</title>
<updated>2017-12-06T17:48:21Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-23T06:54:48Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f0a58aa3f2ca113ff1f435cd186a0d3895a1cafb'/>
<id>urn:sha1:f0a58aa3f2ca113ff1f435cd186a0d3895a1cafb</id>
<content type='text'>
Cleanup asic_reg/vega10/NBIO folder.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 dce header files.</title>
<updated>2017-12-06T17:48:18Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-23T10:18:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=135d4b10d3b64a4b2a77118961ed288c1a88def3'/>
<id>urn:sha1:135d4b10d3b64a4b2a77118961ed288c1a88def3</id>
<content type='text'>
Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add license to Makefiles</title>
<updated>2017-12-04T16:47:55Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-12-01T02:15:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e2874a3c8c0c3b251d288a6149a80b9fd1c2f019'/>
<id>urn:sha1:e2874a3c8c0c3b251d288a6149a80b9fd1c2f019</id>
<content type='text'>
Was missing license text.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>amdgpu/dc: fix indentation warning from smatch.</title>
<updated>2017-11-07T21:22:04Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-11-06T19:30:47Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bf5563ede9f254fba083c6b56e4ca8b836babb1d'/>
<id>urn:sha1:bf5563ede9f254fba083c6b56e4ca8b836babb1d</id>
<content type='text'>
This fixes all the current smatch:
warn: inconsistent indenting

Reviewed-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Read resource_straps from registers for DCE12</title>
<updated>2017-11-02T17:06:26Z</updated>
<author>
<name>Leo (Sunpeng) Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2017-11-01T14:24:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4a74635ce23a4b8758047a733faf791e38032263'/>
<id>urn:sha1:4a74635ce23a4b8758047a733faf791e38032263</id>
<content type='text'>
Now that the registers exist, assign them to the resource_straps struct.

v2: Fix indentation
v3: Fix trailing whitespace and checkpatch warnings.

bug: https://bugs.freedesktop.org/show_bug.cgi?id=103404
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Leo (Sunpeng) Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
