kernel/drivers/gpu/drm/amd/display/dc/dce110, branch linux-4.16.y

drm/amd/display: validate plane format on primary plane

2018-03-07T21:31:19Z

In dce110, the plane configuration is such that plane 0 or the primary plane should be rendered with only RGB data. This patch adds the validation to ensure that no video data is rendered on plane 0. Signed-off-by: Shirish S Reviewed-by: Tony Cheng Signed-off-by: Alex Deucher

drm/amd/display: update infoframe after dig fe is turned on

2018-03-07T21:27:57Z

Before dig fe is enabled, infoframe can't be programmed. So in suspend resume case our infoframe programmming was not going through. This change changes the sequence so that infoframe is programmed after. Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: fix boot-up on vega10

2018-03-07T21:27:54Z

Fixing null-deref on Vega10 due to regression after 'fix cursor related Pstate hang' change. Added null checks in setting cursor position. Signed-off-by: Roman Li Reviewed-by: Eric Yang Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: fix cursor related Pstate hang

2018-03-07T21:27:48Z

Move cursor programming to inside the OTG_MASTER_UPDATE_LOCK If graphics plane go from 1 pipe to hsplit, the cursor updates after mpc programming and unlock. Which means there is a window of time where cursor is enabled on the wrong pipe if it's on the right side of the screen (i.e. case where cursor need to move from pipe 0 to pipe 3 post split). This will cause pstate hang. Solution is to program the cursor while still locked. Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Fix FBC topology change

2018-03-07T21:27:08Z

With FBC enabled there was a potential null-deref on topology change due to hardcorded pipe index. Signed-off-by: Roman Li Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: validate plane in dce110 for scaling

2018-03-07T21:27:01Z

CZ & ST support uptil a limit 2:1 downscaling, this patch adds validate_plane hook, that shall be used to validate the plane attributes sent by the user space based on dce110 capabilities. Signed-off-by: Shirish S Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Call validate_fbc should_enable_fbc

2017-12-20T19:47:56Z

validate_fbc never fails a modeset. It's simply used to decide whether to use FBC or not. Calling it validate_fbc might be confusing to some so rename it to should_enable_fbc. With that let's also remove the DC_STATUS return code and return bool and make enable_fbc a void function since we never check it's return value and probably never want to anyways. Signed-off-by: Harry Wentland Reviewed-by: Roman Li Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Remove dead enable_plane function definition and call

2017-12-20T19:45:52Z

Signed-off-by: Harry Wentland Reviewed-by: Jordan Lazare Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Remove redundant NULL check in DCE11 HWSS

2017-12-14T16:01:00Z

We already check this a couple lines earlier. Signed-off-by: Harry Wentland Reviewed-by: Jordan Lazare Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Move wait for hpd ready out from edp power control.

2017-12-14T16:00:35Z

It may take over 200ms for wait hpd ready. To optimize the resume time, we can power on eDP in init_hw, wait for hpd ready when doing link training. also create separate eDP enable function to make sure eDP is powered up before doing and DPCD access, as HPD low will result in DPDC transaction failure. After optimization, setpowerstate 145ms -> 9.8ms, DPMS 387ms -> 18.9ms Signed-off-by: Yongqiang Sun Signed-off-by: Tony Cheng Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher