<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/display/dc/dc_stream.h, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2018-03-14T21:01:14Z</updated>
<entry>
<title>drm/amd/display: Fixed dim around 1sec when resume from S3 (v2)</title>
<updated>2018-03-14T21:01:14Z</updated>
<author>
<name>Yongqiang Sun</name>
<email>yongqiang.sun@amd.com</email>
</author>
<published>2018-03-05T15:28:34Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=14d6f644368de1a890b747547f36cef0423fbec8'/>
<id>urn:sha1:14d6f644368de1a890b747547f36cef0423fbec8</id>
<content type='text'>
root cause:
DMCU try to perform a smoothness brightness change.Incorrect initial
brightness level causes the 1 sec dim.
Change:
Cache brightness level in stream, and clear it when edp backlight on.
If brightness level in stream is 0, set brightness with ramp value is 0.
DMCU will set the brightness without smoothness transition.

v2: squash in null pointer fix (Harry)

Signed-off-by: Yongqiang Sun &lt;yongqiang.sun@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add variable refresh rate parameters to DC structures</title>
<updated>2018-03-14T20:08:47Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2018-02-28T16:37:51Z</published>
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<id>urn:sha1:64ed6a2eba3cb4146d2ff731293939ae84fad740</id>
<content type='text'>
Time stamping will be part of surface, and will be updated when address is flipped.
FreeSync parameters will be attached to stream, as it adjusts the timing dynamically.

Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Varibright fix bug and review comments</title>
<updated>2018-03-14T20:08:42Z</updated>
<author>
<name>SivapiriyanKumarasamy</name>
<email>sivapiriyan.kumarasamy@amd.com</email>
</author>
<published>2018-02-23T18:04:13Z</published>
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<id>urn:sha1:9aef1a31709076660f7d5f638ab5ecadea4ca856</id>
<content type='text'>
Fix bug and make changes from review 132656

Signed-off-by: SivapiriyanKumarasamy &lt;sivapiriyan.kumarasamy@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Vari-bright looks disabled near end of MM14</title>
<updated>2018-03-14T20:08:41Z</updated>
<author>
<name>SivapiriyanKumarasamy</name>
<email>sivapiriyan.kumarasamy@amd.com</email>
</author>
<published>2018-02-13T22:37:23Z</published>
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<id>urn:sha1:aa5a5777304228819a52562d346bc3eb1b4873fa</id>
<content type='text'>
Avoid hanging DMCU by setting abm level only when OTG unblanked

Signed-off-by: SivapiriyanKumarasamy &lt;sivapiriyan.kumarasamy@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add psr_version to stream</title>
<updated>2018-03-05T20:33:56Z</updated>
<author>
<name>Xingyue Tao</name>
<email>xingyue.tao@amd.com</email>
</author>
<published>2018-02-16T21:29:13Z</published>
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<id>urn:sha1:85075fa04287dce81397dab75af0992274727b82</id>
<content type='text'>
Brightness could not be changed for some panels whose DPCD_version is below 1.2
Now psr_version is added into stream, and it copies from the displayTarget's psr_version.
It checks if the stream's psr_versio is non-zero and sets the vsc info packet revision now.

Signed-off-by: Xingyue Tao &lt;xingyue.tao@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Expose dither setting functionality to Linux</title>
<updated>2018-02-19T19:20:08Z</updated>
<author>
<name>Leo (Sunpeng) Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2018-02-06T14:50:49Z</published>
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<id>urn:sha1:44af70a7428404f8c00b77988888c8b495b78766</id>
<content type='text'>
We will need this to disable dither for CRC capture.

Signed-off-by: Leo (Sunpeng) Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Call update_stream_signal directly from amdgpu_dm</title>
<updated>2018-02-19T19:18:35Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2017-12-18T17:01:30Z</published>
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<id>urn:sha1:9182b4cb445dc31bd46d2cc1e9e7e38771fdbae4</id>
<content type='text'>
There's no good place in DC to cover all place where stream signal should
be updated. update_stream_signal depends on timing which comes from DM.

Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move output_tf to stream_state/update</title>
<updated>2018-02-19T19:18:34Z</updated>
<author>
<name>Yongqiang Sun</name>
<email>yongqiang.sun@amd.com</email>
</author>
<published>2018-01-03T16:33:27Z</published>
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<id>urn:sha1:ff1374c94bb7d086a01c745176e418e7ac7e2ce6</id>
<content type='text'>
Signed-off-by: Yongqiang Sun &lt;yongqiang.sun@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename amdgpu_get_crtc_scanoutpos</title>
<updated>2018-02-19T19:18:28Z</updated>
<author>
<name>Samuel Li</name>
<email>Samuel.Li@amd.com</email>
</author>
<published>2018-01-19T20:53:16Z</published>
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<id>urn:sha1:aa8e286a8af9fc9534aa7ec0be8122b16cf1fd41</id>
<content type='text'>
Add display to the name for consistency.

Signed-off-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Implement interface for CRC on CRTC</title>
<updated>2018-02-19T19:17:36Z</updated>
<author>
<name>Leo (Sunpeng) Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2017-12-18T19:20:39Z</published>
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<id>urn:sha1:31aec354f92ca811df79439233130dbd232162a9</id>
<content type='text'>
Add interfaces in DC for per CRTC CRC configuration and fetching.
Also implement amdgpu_dm functions to hook onto DRM.

Signed-off-by: Leo (Sunpeng) Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
