kernel/drivers/gpu/drm/amd/display/dc/calcs, branch linux-5.1.y

drm/amd/display: don't call dm_pp_ function from an fpu block

2019-03-06T20:31:20Z

Powerplay functions called from dm_pp_* functions tend to do a mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as those will disable/enable preemption. Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make sure they happen outside of kernel_fpu_begin/end. Cc: stable@vger.kernel.org Acked-by: Alex Deucher Signed-off-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amdgpu/display: fix compiler errors [-Werror,-Wparentheses-equality]

2019-02-06T18:29:19Z

Remove extraneous parentheses around the comparison to silence this warning Signed-off-by: Pratik Vishwakarma Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

Revert "drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines"

2019-01-29T20:16:18Z

This reverts commit 10117450735c7a7c0858095fb46a860e7037cb9a. Causes a crash. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109487 Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org # 4.19

drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines

2019-01-25T21:15:37Z

arch/x86/Makefile disables SSE and SSE2 for the whole kernel. The AMDGPU drivers modified in this patch re-enable SSE but not SSE2. Turn on SSE2 to support emitting double precision floating point instructions rather than calls to non-existent (usually available from gcc_s or compiler_rt) floating point helper routines. Link: https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html Link: https://github.com/ClangBuiltLinux/linux/issues/327 Cc: stable@vger.kernel.org # 4.19 Reported-by: S, Shirish Reported-by: Matthias Kaehlcke Suggested-by: James Y Knight Suggested-by: Nathan Chancellor Signed-off-by: Nick Desaulniers Tested-by: Guenter Roeck Tested-by: Matthias Kaehlcke Tested-by: Nathan Chancellor Reviewed-by: Harry Wentland Signed-off-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Use 100 Hz precision for pipe pixel clocks

2019-01-14T20:04:39Z

[Why] Users would like more accurate pixel clocks, especially for fractional "TV" frame rates like 59.94 Hz. [How] Store and communicate pixel clocks with 100 Hz accuracy from dc_crtc_timing through to BIOS command table setpixelclock call. Signed-off-by: Ken Chalmers Reviewed-by: Charlene Liu Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: update DCN dml calcs

2019-01-14T20:04:37Z

DV have made updates to DCN dml which we need to pull in Signed-off-by: Dmytro Laktyushkin Reviewed-by: Eric Bernstein Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: remove sink reference in dc_stream_state

2019-01-14T20:04:36Z

[why] dc_stream_state containing a pointer to sink is poor design. Sink describes the display, and the specifications or capabilities it has. That information is irrelevant for dc_stream_state, which describes hardware state, and is generally used for hardware programming. It could further be argued that dc_sink itself is just a convenience dc provides, and DC should be perfectly capable of programming hardware without any dc_sinks (for example, emulated sinks). [how] Phase 1: Deprecate use of dc_sink pointer in dc_stream. Most references are trivial to remove, but some call sites are risky (such as is_timing_changed) with no obvious logical replacement. These will be removed in follow up change. Add dc_link pointer to dc_stream. This is the typical reason DC really needed sink pointer, and most call sites are replaced with this. DMs also need minor updates, as all 3 DMs leverage stream->sink for some functionality. this is replaced instead by a pointer to private data inside dc_stream_state, which is used by DMs as a quality of life improvment for some key functionality. it allows DMs to set pointers have to their own objects which associate OS objects to dc_stream_states (such as DisplayTarget and amdgpu_dm_connector). Without the private pointer, DMs would be forced to perform a lookup for callbacks. Signed-off-by: Jun Lei Reviewed-by: Aric Cyr Acked-by: David Francis Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: update bw formula to v252

2019-01-14T20:04:35Z

[why] There was a recent fix in the BW spreadsheet to allow timing with very large vblank. Need to be ported into driver. Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Dmytro Laktyushkin Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part4

2018-11-05T19:21:41Z

[Why] In DCN we want direct DC to SMU calls, with minimal interference from pplib. The reason for each pp_smu interface mapping to 1 SMU message is so we can have the sequencing of different SMU message in DC and shared across different OS's. This will also simplify debugging as DAL owns this interaction and there's no confusion about division of ownership. [How] Part 4: Change clock units so they match the values PPLib sends to SMU. Signed-off-by: Fatemeh Darbehani Reviewed-by: Tony Cheng Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: program v_update and v_ready with proper field

2018-09-27T02:09:06Z

[WHY] There are two different variables used to calculate v_update and v_ready, one for validation and the other for performance parameter calculation. Before the variable for validation was used which caused underflow on 1080edp with vsr enabled [HOW] program v_update and v_ready with the variables for performance parameter calculation Signed-off-by: Su Sung Chung Reviewed-by: Dmytro Laktyushkin Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher