<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/display/dc/Makefile, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2019-01-25T21:15:36Z</updated>
<entry>
<title>drm/amd/display: Introduce DC VM interface</title>
<updated>2019-01-25T21:15:36Z</updated>
<author>
<name>Eryk Brol</name>
<email>eryk.brol@amd.com</email>
</author>
<published>2018-12-07T15:25:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b9708648766d8b15003a543ca36863e731b7b1ba'/>
<id>urn:sha1:b9708648766d8b15003a543ca36863e731b7b1ba</id>
<content type='text'>
Virtual memory allows display to support flipping to surfaces which
are not allocated contiguously in memory with physical addresses,
instead a 1-4 level page table is used.

This is beneficial because it allows the scattering of large surfaces
to improve memory efficiency and security.

Signed-off-by: Eryk Brol &lt;eryk.brol@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove i2caux folder</title>
<updated>2019-01-14T20:40:54Z</updated>
<author>
<name>David Francis</name>
<email>David.Francis@amd.com</email>
</author>
<published>2018-11-30T16:02:59Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=077d0b6ba2114b86d353fce4eaca6cfb2e344eb6'/>
<id>urn:sha1:077d0b6ba2114b86d353fce4eaca6cfb2e344eb6</id>
<content type='text'>
[Why]
It is huge, unmaintainable, needlessly layered, and obsolete

[How]
Remove it.  All of it.  Also remove the i2caux struct in
dc_context and the code that created and destructed it

Signed-off-by: David Francis &lt;David.Francis@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"</title>
<updated>2018-08-21T19:32:28Z</updated>
<author>
<name>Leo (Sunpeng) Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2018-08-16T19:44:38Z</published>
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<id>urn:sha1:dc37a9a08d5760e405ffdd94ec6bbb6efededba6</id>
<content type='text'>
This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0.

We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Leo (Sunpeng) Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86</title>
<updated>2018-07-19T18:56:43Z</updated>
<author>
<name>Michel Dänzer</name>
<email>michel.daenzer@amd.com</email>
</author>
<published>2018-07-17T10:37:45Z</published>
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<id>urn:sha1:4841203102a337b4b627e6dd3a1dc8c88aec982b</id>
<content type='text'>
Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add license to Makefiles</title>
<updated>2017-12-04T16:47:55Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-12-01T02:15:50Z</published>
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<id>urn:sha1:e2874a3c8c0c3b251d288a6149a80b9fd1c2f019</id>
<content type='text'>
Was missing license text.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: Enable DCN in DC</title>
<updated>2017-09-26T22:06:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-06-15T20:27:42Z</published>
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<id>urn:sha1:ff5ef99248662ef98a64c11c5370ecd9fbbf57a6</id>
<content type='text'>
Enable DCN in DC.

Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove DCE12 guards</title>
<updated>2017-09-26T21:19:36Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-06-15T20:21:43Z</published>
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<id>urn:sha1:8fa9ca2ec6919656db87391a1633692ee8d57c22</id>
<content type='text'>
Signed-off-by: Jordan Lazare &lt;Jordan.Lazare@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable DCE12 support</title>
<updated>2017-09-26T21:19:23Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-06-15T20:20:24Z</published>
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<id>urn:sha1:2c8ad2d5a20c8b7425b547dd4a969ffecad29b39</id>
<content type='text'>
This wires DCE12 support into DC and enables it.

Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove dc_target object</title>
<updated>2017-09-26T21:09:40Z</updated>
<author>
<name>Aric Cyr</name>
<email>aric.cyr@amd.com</email>
</author>
<published>2016-12-29T20:27:12Z</published>
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<id>urn:sha1:ab2541b67395088b9de8ebf3943ef9ef86bccc41</id>
<content type='text'>
dc_target does not fit well into DRM framework so removed it.
This will prevent the driver from leveraging the pipe-split
code for tiled displays, so will have to be handled at a higher
level.  Most places that used dc_target now directly use dc_stream
instead.

Signed-off-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: moving remaining functionality from gpu to dce_clocks</title>
<updated>2017-09-26T21:04:10Z</updated>
<author>
<name>Dmytro Laktyushkin</name>
<email>Dmytro.Laktyushkin@amd.com</email>
</author>
<published>2016-12-02T19:48:04Z</published>
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<id>urn:sha1:e11b86ad7d97671ec9543824de0529bd3f8d2db7</id>
<content type='text'>
Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
