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<title>kernel/drivers/gpu/drm/amd/amdgpu, branch master</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=master</id>
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<updated>2026-03-17T22:03:09Z</updated>
<entry>
<title>drm/amdgpu: rework how we handle TLB fences</title>
<updated>2026-03-17T22:03:09Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-16T15:04:46Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e9f58ff991dd4be13fd7a651bbf64329c090af09'/>
<id>urn:sha1:e9f58ff991dd4be13fd7a651bbf64329c090af09</id>
<content type='text'>
Add a new VM flag to indicate whether or not we need
a TLB fence.  Userqs (KFD or KGD) require a TLB fence.
A TLB fence is not strictly required for kernel queues,
but it shouldn't hurt.  That said, enabling this
unconditionally should be fine, but it seems to tickle
some issues in KIQ/MES.  Only enable them for KFD,
or when KGD userq queues are enabled (currently via module
parameter).

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4798
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4749
Fixes: f3854e04b708 ("drm/amdgpu: attach tlb fence to the PTs update")
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 69c5fbd2b93b5ced77c6e79afe83371bca84c788)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix ISP segfault issue in kernel v7.0</title>
<updated>2026-03-17T16:19:29Z</updated>
<author>
<name>Pratap Nirujogi</name>
<email>pratap.nirujogi@amd.com</email>
</author>
<published>2026-03-11T16:15:09Z</published>
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<id>urn:sha1:3fc4648b53b7e393b91e63600e28e6f25c8ef0c5</id>
<content type='text'>
Add NULL pointer checks for dev-&gt;type before accessing
dev-&gt;type-&gt;name in ISP genpd add/remove functions to
prevent kernel crashes.

This regression was introduced in v7.0 as the wakeup sources
are registered using physical device instead of ACPI device.
This led to adding wakeup source device as the first child of
AMDGPU device without initializing dev-type variable, and
resulted in segfault when accessed it in the amdgpu isp driver.

Fixes: 057edc58aa59 ("ACPI: PM: Register wakeup sources under physical devices")
Suggested-by: Bin Du &lt;Bin.Du@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Pratap Nirujogi &lt;pratap.nirujogi@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit c51632d1ed7ac5aed2d40dbc0718d75342c12c6a)
</content>
</entry>
<entry>
<title>drm/amdgpu/gmc9.0: add bounds checking for cid</title>
<updated>2026-03-17T16:19:23Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-16T19:51:08Z</published>
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<id>urn:sha1:f39e1270277f4b06db0b2c6ec9405b6dd766fb13</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Cc: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit e14d468304832bcc4a082d95849bc0a41b18ddea)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub4.2.0: add bounds checking for cid</title>
<updated>2026-03-17T16:19:17Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-04T22:26:17Z</published>
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<id>urn:sha1:9c52f49545478aa47769378cd0b53c5005d6a846</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit dea5f235baf3786bfd4fd920b03c19285fdc3d9f)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub4.1.0: add bounds checking for cid</title>
<updated>2026-03-17T16:19:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-04T22:25:56Z</published>
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<id>urn:sha1:3cdd405831d8cc50a5eae086403402697bb98a4a</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 04f063d85090f5dd0c671010ce88ee49d9dcc8ed)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub3.0: add bounds checking for cid</title>
<updated>2026-03-17T16:19:04Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-04T22:25:30Z</published>
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<id>urn:sha1:cdb82ecbeccb55fae75a3c956b605f7801a30db1</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit f14f27bbe2a3ed7af32d5f6eaf3f417139f45253)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub3.0.2: add bounds checking for cid</title>
<updated>2026-03-17T16:18:58Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-04T22:25:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e5e6d67b1ce9764e67aef2d0eef9911af53ad99a'/>
<id>urn:sha1:e5e6d67b1ce9764e67aef2d0eef9911af53ad99a</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 1441f52c7f6ae6553664aa9e3e4562f6fc2fe8ea)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub3.0.1: add bounds checking for cid</title>
<updated>2026-03-17T16:18:52Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-04T22:24:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5d4e88bcfef29569a1db224ef15e28c603666c6d'/>
<id>urn:sha1:5d4e88bcfef29569a1db224ef15e28c603666c6d</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 5f76083183363c4528a4aaa593f5d38c28fe7d7b)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub2.3: add bounds checking for cid</title>
<updated>2026-03-17T16:18:46Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-04T22:24:10Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a54403a534972af5d9ba5aaa3bb6ead612500ec6'/>
<id>urn:sha1:a54403a534972af5d9ba5aaa3bb6ead612500ec6</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 89cd90375c19fb45138990b70e9f4ba4806f05c4)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub2.0: add bounds checking for cid</title>
<updated>2026-03-17T16:18:34Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-03-04T22:22:43Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0b26edac4ac5535df1f63e6e8ab44c24fe1acad7'/>
<id>urn:sha1:0b26edac4ac5535df1f63e6e8ab44c24fe1acad7</id>
<content type='text'>
The value should never exceed the array size as those
are the only values the hardware is expected to return,
but add checks anyway.

Reviewed-by: Benjamin Cheng &lt;benjamin.cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit e064cef4b53552602bb6ac90399c18f662f3cacd)
Cc: stable@vger.kernel.org
</content>
</entry>
</feed>
