<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2017-12-27T16:34:02Z</updated>
<entry>
<title>drm/amdgpu: rename vm_id to vmid</title>
<updated>2017-12-27T16:34:02Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-12-18T16:08:25Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=c4f46f22c448ff571eb8fdbe4ab71a25805228d1'/>
<id>urn:sha1:c4f46f22c448ff571eb8fdbe4ab71a25805228d1</id>
<content type='text'>
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: correct vce fw data and stack size</title>
<updated>2017-12-12T19:50:12Z</updated>
<author>
<name>Frank Min</name>
<email>Frank.Min@amd.com</email>
</author>
<published>2017-11-06T07:34:55Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=1cb4ca59687dc941d5df56aa63ff9c7fa7f7e92f'/>
<id>urn:sha1:1cb4ca59687dc941d5df56aa63ff9c7fa7f7e92f</id>
<content type='text'>
this fix the VCE world switch hang issue

Signed-off-by: Frank Min &lt;Frank.Min@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: allow get_vm_pde to change flags as well</title>
<updated>2017-12-12T19:46:19Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-11-29T12:27:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3de676d8e71c0a4094b3e5005a311c36c6b6ffc6'/>
<id>urn:sha1:3de676d8e71c0a4094b3e5005a311c36c6b6ffc6</id>
<content type='text'>
And also provide the level for which we need a PDE.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/admgpu: Reduce the usage of soc15ip.h</title>
<updated>2017-12-08T16:35:19Z</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2017-11-29T19:04:58Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4fd09a19a6337b1a58d6de8777e2210cec55ae84'/>
<id>urn:sha1:4fd09a19a6337b1a58d6de8777e2210cec55ae84</id>
<content type='text'>
Remove the header where it's not used.

Acked-by: Christian Konig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: correct vce4.0 fw config for SRIOV (V2)</title>
<updated>2017-12-06T17:48:28Z</updated>
<author>
<name>Frank Min</name>
<email>Frank.Min@amd.com</email>
</author>
<published>2017-11-06T07:34:55Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=722570435bb066c17ff42bb40fb0bbe581b2eba5'/>
<id>urn:sha1:722570435bb066c17ff42bb40fb0bbe581b2eba5</id>
<content type='text'>
1. program vce 4.0 fw with 48 bit address
2. correct vce 4.0 fw stack and date offset

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Frank Min &lt;Frank.Min@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 header files.</title>
<updated>2017-12-06T17:48:22Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-24T04:31:36Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fb960bd28354805a7e2a6dbdf8d8d07a5160d0cd'/>
<id>urn:sha1:fb960bd28354805a7e2a6dbdf8d8d07a5160d0cd</id>
<content type='text'>
Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 mmhub header files.</title>
<updated>2017-12-06T17:48:20Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-23T06:30:43Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=65417d9f553b5877a3fa4e32544e6a2bcb539ea9'/>
<id>urn:sha1:65417d9f553b5877a3fa4e32544e6a2bcb539ea9</id>
<content type='text'>
Cleanup asic_reg/vega10/MMHUB folder.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 vce header files.</title>
<updated>2017-12-06T17:48:19Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-23T06:08:34Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=18297a215ba44a9a28aea87486ec52aecf807e13'/>
<id>urn:sha1:18297a215ba44a9a28aea87486ec52aecf807e13</id>
<content type='text'>
Cleanup asic_reg/vega10/VCE folder.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove the clearance of vce 4.0 interrupt mask</title>
<updated>2017-09-26T19:14:03Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2017-03-03T16:54:37Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f6e8b15af7c96a429b320eb8414791666c0bd2b7'/>
<id>urn:sha1:f6e8b15af7c96a429b320eb8414791666c0bd2b7</id>
<content type='text'>
Requested by SRIOV, the clearance of the bit moved into firmware

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vce4: optimize vce 4.0 init table sequence for SRIOV</title>
<updated>2017-08-15T18:45:48Z</updated>
<author>
<name>Frank Min</name>
<email>Frank.Min@amd.com</email>
</author>
<published>2017-06-12T02:56:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a1aacc97593c2aed620a8b62ab929d239ee0b1cc'/>
<id>urn:sha1:a1aacc97593c2aed620a8b62ab929d239ee0b1cc</id>
<content type='text'>
Optimize init table sequence for sriov.

Signed-off-by: Frank Min &lt;Frank.Min@amd.com&gt;
Signed-off-by: Xiangliang.Yu &lt;Xiangliang.Yu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
