kernel/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c, branch linux-5.1.y

drm/amdgpu: Retire amdgpu_ring.ready flag v4

2018-11-05T19:21:23Z

Start using drm_gpu_scheduler.ready isntead. v3: Add helper function to run ring test and set sched.ready flag status accordingly, clean explicit sched.ready sets from the IP specific files. v4: Add kerneldoc and rebase. Signed-off-by: Andrey Grodzovsky Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: move more defines into amdgpu_irq.h

2018-09-27T02:09:22Z

Everything that isn't related to the IH ring. Signed-off-by: Christian König Reviewed-by: Huang Rui Signed-off-by: Alex Deucher

drm/amdgpu/vce: VCE entity initialization relies on ring initializtion

2018-08-13T22:21:29Z

Entity init should after ring init, as the entity's sched_rq's initialization is in ring init. SWDEV-161495 Signed-off-by: Emily Deng Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu/vce: simplify vce instance setup

2018-07-05T21:39:53Z

Set the me instance in early init and use that rather than calculating the instance based on the ring pointer. Reviewed-by: James Zhu Reviewed-by: Leo Liu Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: various cleanups for uvd/vce.

2017-04-04T17:40:33Z

Signed-off-by: Rex Zhu Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: remove redundant outer loop and remove commented out code

2017-03-30T03:54:04Z

The outer loop is redundant and can be removed as it is doing nothing useful. Also remove some commented out code that is not being used. Detected by CoverityScan, CID#1402073 Signed-off-by: Colin Ian King Signed-off-by: Alex Deucher

drm/amdgpu/ih: store the full context id

2017-03-30T03:53:37Z

The contextID field (formerly known as src_data) of the IH vector stores client specific information about an interrupt. It was expanded from 32 bits to 128 on newer asics. Expand the src_id field to handle this. Reviewed-by: Harry Wentland Reviewed-by: Christian König Signed-off-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: switch ih handling to two levels (v3)

2017-03-30T03:53:37Z

Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: Alex Deucher Signed-off-by: Ken Wang Reviewed-by: Ken Wang Signed-off-by: Alex Deucher

drm/amdgpu: change wptr to 64 bits (v2)

2017-03-30T03:53:35Z

Newer asics need 64 bit wptrs. If the wptr is now smaller than the rptr that doesn't indicate a wrap-around anymore. v2: integrate Christian's comments. Signed-off-by: Ken Wang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu/vce2: fix vce bar programming

2017-03-30T03:53:22Z

Program the VCE BAR and offsets properly. The current code was carried over from a limitation from older VCE versions. Reviewed-by: Junwei Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher