kernel/drivers/gpu/drm/amd/amdgpu/soc15_common.h, branch linux-5.1.y

drm/amdgpu:Improves robustness of SOC15_WAIT_ON_RREG

2018-12-18T22:39:03Z

If register value is updating, reset timeout counter. It improves robustness of SOC15_WAIT_ON_RREG. Signed-off-by: James Zhu Reviewed-by: Leo Liu Signed-off-by: Alex Deucher

drm/amdgpu/soc15: fix warnings in register macro

2018-09-27T02:09:26Z

expects argument of type ‘unsigned int’ has type ‘long int’ Fixes: 52e211c1f04 ("drm/amdgpu:Add error message when register failed to reach expected value") Reviewed-by: Christian König Reviewed-by: James Zhu Signed-off-by: Alex Deucher

drm/amdgpu:Add DPG mode read/write macro

2018-09-27T02:09:24Z

Some registers read/write needs program through SDRAM pool under DPG mode. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Reviewed-by: Huang Rui Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu:Add error message when register failed to reach expected value

2018-09-13T20:14:08Z

Add error message when register failed to reach expected value, It will help discover potential issue. Signed-off-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: Add SOC15_WAIT_ON_RREG macro define

2018-05-24T05:18:02Z

Add new macro to wait on a register field to be a specific value. Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu Signed-off-by: Alex Deucher

drm/amdgpu: convert nbio to use callbacks (v2)

2017-12-13T22:28:07Z

Cleans up and consolidates all of the per-asic logic. v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming) Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset

2017-12-08T16:32:24Z

Acked-by: Christian Konig Signed-off-by: Shaoyun Liu Signed-off-by: Alex Deucher

drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array

2017-12-08T16:18:51Z

Handle dynamic offsets correctly in static arrays. Acked-by: Christian Konig Signed-off-by: Shaoyun Liu Signed-off-by: Alex Deucher

drm/amdgpu: Use dynamic IP offset for register access on SOC15

2017-12-08T16:17:56Z

Update the register access macros and functions to take into account the new dynamic IP base offsets. Acked-by: Christian Konig Signed-off-by: Shaoyun Liu Signed-off-by: Alex Deucher

drm/amdgpu: Add WREG32_SOC15_NO_KIQ macro define

2017-07-14T15:06:10Z

Signed-off-by: Shaoyun Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher