kernel/drivers/gpu/drm/amd/amdgpu/si_enums.h, branch linux-5.1.y

drm/amdgpu: enable ABGR and XBGR formats (v2)

2018-08-27T16:10:19Z

Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled (v2) Crossbar registers are defined and used to swap red and blue channels, keeping the existing coding style in each of the dce modules. After setting crossbar bits in fb_swap, use bitwise OR for big endian where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD() Signed-off-by: Mauro Rossi Signed-off-by: Alex Deucher

drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN

2017-02-08T22:25:02Z

Signed-off-by: Flora Cui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN

2017-02-08T22:24:45Z

Signed-off-by: Flora Cui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amd/amdgpu: port of DCE v6 to new headers (v3)

2016-11-23T20:08:42Z

Port of SI DCE v6 over to new AMDGPU headers. Tested on a Tahiti with GNOME through various hot plugs/rotations/sizes/fullscreen/windowed and staging drm/xf86-video-amdgpu. (v2) Re-factored to remove formatting changes to si_enums.h as well rename various defines. (v3) Rebase on upstream Signed-off-by: Tom St Denis Reviewed-by: Alex Deucher Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amd/amdgpu: Port GMC v6 driver to new SI headers (v2)

2016-11-11T15:21:14Z

Port the GMC v6 driver over to the new SI headers. Tested with a Tahiti SI ASIC. (v2) Fixed a couple of typos (in commented code) and moved defines to si_enums.h Signed-off-by: Tom St Denis Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amd/amdgpu: add SI defines/registers

2016-11-11T15:21:08Z

Add missing gca MMIO registers and defines necessary for the next patch which re-works a lot of gfx v6 to use the new SI headers. Signed-off-by: Tom St Denis Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher