<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/si_enums.h, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2017-02-08T22:25:02Z</updated>
<entry>
<title>drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN</title>
<updated>2017-02-08T22:25:02Z</updated>
<author>
<name>Flora Cui</name>
<email>Flora.Cui@amd.com</email>
</author>
<published>2017-02-07T07:35:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ea0875a0b6fc92c6d61376ec4890ae716a2156e4'/>
<id>urn:sha1:ea0875a0b6fc92c6d61376ec4890ae716a2156e4</id>
<content type='text'>
Signed-off-by: Flora Cui &lt;Flora.Cui@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN</title>
<updated>2017-02-08T22:24:45Z</updated>
<author>
<name>Flora Cui</name>
<email>Flora.Cui@amd.com</email>
</author>
<published>2017-02-07T07:32:34Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2c0c8f2d38435ec7e20f50d658ddba0155b35663'/>
<id>urn:sha1:2c0c8f2d38435ec7e20f50d658ddba0155b35663</id>
<content type='text'>
Signed-off-by: Flora Cui &lt;Flora.Cui@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: port of DCE v6 to new headers (v3)</title>
<updated>2016-11-23T20:08:42Z</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2016-11-14T18:55:17Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b00861b98b4eed49460abc444f5455cfe52c40ea'/>
<id>urn:sha1:b00861b98b4eed49460abc444f5455cfe52c40ea</id>
<content type='text'>
Port of SI DCE v6 over to new AMDGPU headers.  Tested on a
Tahiti with GNOME through various hot plugs/rotations/sizes/fullscreen/windowed and
staging drm/xf86-video-amdgpu.

(v2) Re-factored to remove formatting changes to si_enums.h
     as well rename various defines.
(v3) Rebase on upstream

Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu:  Port GMC v6 driver to new SI headers (v2)</title>
<updated>2016-11-11T15:21:14Z</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2016-11-08T16:55:42Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7251826971d67daf4c4e6a0d6f83a023683eb19a'/>
<id>urn:sha1:7251826971d67daf4c4e6a0d6f83a023683eb19a</id>
<content type='text'>
Port the GMC v6 driver over to the new SI headers.

Tested with a Tahiti SI ASIC.

(v2) Fixed a couple of typos (in commented code) and moved
     defines to si_enums.h

Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: add SI defines/registers</title>
<updated>2016-11-11T15:21:08Z</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2016-11-07T19:06:01Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5e2e2119955a9f18beccd6603bdd255dad18eb15'/>
<id>urn:sha1:5e2e2119955a9f18beccd6603bdd255dad18eb15</id>
<content type='text'>
Add missing gca MMIO registers and defines necessary for the
next patch which re-works a lot of gfx v6 to use the new SI
headers.

Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
