<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/si_dpm.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2018-04-03T18:08:46Z</updated>
<entry>
<title>drm/amdgpu: Fix PCIe lane width calculation</title>
<updated>2018-04-03T18:08:46Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-04-02T17:29:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=41212e2fe72b26ded7ed78224d9eab720c2891e2'/>
<id>urn:sha1:41212e2fe72b26ded7ed78224d9eab720c2891e2</id>
<content type='text'>
The calculation of the lane widths via ATOM_PPLIB_PCIE_LINK_WIDTH_MASK and
ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT macros did not increment the resulting
value, per the comment in pptable.h ("lanes - 1"), and per usage elsewhere.
Port of the radeon fix to amdgpu.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102553
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix kernel NULL pointer dereference in dpm functions</title>
<updated>2018-03-21T04:44:50Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-20T08:32:07Z</published>
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<id>urn:sha1:eb4900aa4c49e978041405ab2eeeb8538c7f736a</id>
<content type='text'>
caused by
'commit 83e3c4615872 ("drm/amdgpu: Remove wrapper layer of smu ip functions")'

BUG: unable to handle kernel NULL pointer dereference at 00000000000005d8
[  313.241459] IP: ci_dpm_read_sensor+0x37/0xf0 [amdgpu]

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Remove wrapper layer of smu ip functions</title>
<updated>2018-03-15T14:57:50Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-12T11:52:23Z</published>
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<id>urn:sha1:b905090d2bae2e6189511714a7b88691b439c5a1</id>
<content type='text'>
1. delete amdgpu_powerplay.c used for wrapping smu ip functions
2. delete struct pp_instance,
3. make struct hwmgr as the smu hw handle.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: used cached pcie gen info for SI (v2)</title>
<updated>2018-03-05T18:30:55Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-02-26T16:05:10Z</published>
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<id>urn:sha1:0bf6718537cf1112cbe2d7c4349188d7e89be90c</id>
<content type='text'>
Rather than querying it every time we need it.
Also fixes a crash in VM pass through if there is no
root bridge because the cached value fetch already checks
this properly.

v2: fix includes

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105244
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Rex Zhu&lt;rezhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/pp: remove the get_temperature API</title>
<updated>2018-02-19T19:18:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-01-24T22:44:48Z</published>
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<id>urn:sha1:21a381f79e807052cbb8cb8f855caa6d13a5737b</id>
<content type='text'>
This is also supported with the read_sensor API and there
were no more users of the get_temperature API.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h</title>
<updated>2018-02-19T19:17:43Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-12T13:52:22Z</published>
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<id>urn:sha1:770d13b19fdf365a99e559f1d47f1380910a947d</id>
<content type='text'>
And rename it to amdgpu_gmc as well.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add dpm quirk for Jet PRO (v2)</title>
<updated>2018-01-10T20:44:27Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-11-21T17:10:57Z</published>
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<id>urn:sha1:f2e5262f75ecb40a6e56554e156a292ab9e1d1b7</id>
<content type='text'>
Fixes stability issues.

v2: clamp sclk to 600 Mhz

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=103370
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/powerplay: Followup fixes to mc_reg_address</title>
<updated>2017-12-06T17:48:00Z</updated>
<author>
<name>Ernst Sjöstrand</name>
<email>ernstp@gmail.com</email>
</author>
<published>2017-11-19T17:52:46Z</published>
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<id>urn:sha1:8cdbad98c52380bde20ea5753533640d2cdcc005</id>
<content type='text'>
This is a followup to:
drm/amd/powerplay: Fix buffer overflows with mc_reg_address

Rework *_set_mc_special_registers for the other architectures to
use the same logic as the first patch. This allows the last entry
of the array to be filled without an error message for example.
This doesn't fix any known problems, perhaps avoided by luck.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Ernst Sjöstrand &lt;ernstp@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move common pm sysfs code to amdgpu_device.c</title>
<updated>2017-09-28T20:03:31Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2017-09-22T09:47:27Z</published>
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<id>urn:sha1:d2f52ac800fec229f2931603e8b7fb9c5ade7aa7</id>
<content type='text'>
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: unify the interface of amd_pm_funcs</title>
<updated>2017-09-19T03:30:35Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2017-09-06T10:43:52Z</published>
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<id>urn:sha1:cd4d74648b8021f0d0c7cc31a92fb4ea436a0019</id>
<content type='text'>
put amd_pm_funcs table in struct powerplay for all
asics.

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
