<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/si.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2018-04-03T18:08:45Z</updated>
<entry>
<title>drm/amdgpu/si: implement get/set pcie_lanes asic callback</title>
<updated>2018-04-03T18:08:45Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-04-03T17:54:33Z</published>
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<id>urn:sha1:20ca25e86c56f5490bdc80318f4fc06466e4c21b</id>
<content type='text'>
Required for dpm setup on some asics. Fixes a NULL dereference
on asics that require it.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102553
Tested-by: Abel Garcia Dorta &lt;mercuriete@yahoo.es&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: Remove wrapper layer of smu ip functions</title>
<updated>2018-03-15T14:57:50Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-03-12T11:52:23Z</published>
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<id>urn:sha1:b905090d2bae2e6189511714a7b88691b439c5a1</id>
<content type='text'>
1. delete amdgpu_powerplay.c used for wrapping smu ip functions
2. delete struct pp_instance,
3. make struct hwmgr as the smu hw handle.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: used cached pcie gen info for SI (v2)</title>
<updated>2018-03-05T18:30:55Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-02-26T16:05:10Z</published>
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<id>urn:sha1:0bf6718537cf1112cbe2d7c4349188d7e89be90c</id>
<content type='text'>
Rather than querying it every time we need it.
Also fixes a crash in VM pass through if there is no
root bridge because the cached value fetch already checks
this properly.

v2: fix includes

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105244
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Rex Zhu&lt;rezhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: add optional ring to *_hdp callbacks</title>
<updated>2018-02-19T19:18:20Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-19T13:17:40Z</published>
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<id>urn:sha1:698825653fdf1a696e1b9458ed9fc4aa2c6587d4</id>
<content type='text'>
This adds an optional ring to the invalidate_hdp and flush_hdp
callbacks. If the ring isn't specified or the emit_wreg function not
available the HDP operation will be done with the CPU otherwise by
writing on the ring.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add HDP asic callbacks for SI</title>
<updated>2018-02-19T19:17:12Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-09-06T22:05:43Z</published>
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<id>urn:sha1:2d5e0807edf3a3ff44e52ab8ab3cfd675f6c8dad</id>
<content type='text'>
Needed to flush and invalidate the HDP block using the CPU.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename ip block helper functions</title>
<updated>2017-12-18T15:59:40Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-12-15T21:18:00Z</published>
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<id>urn:sha1:2990a1fc012e1bb4523a54d2c27eebc21a2c7e7e</id>
<content type='text'>
add device to the name for consistency.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename amdgpu_program_register_sequence</title>
<updated>2017-12-18T15:59:13Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-12-14T21:20:19Z</published>
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<id>urn:sha1:9c3f2b54746f764e1b695797c78bc46b8713f067</id>
<content type='text'>
add device for consistency with other functions in this file.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result</title>
<updated>2017-12-06T17:47:21Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-11-03T14:59:25Z</published>
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<id>urn:sha1:c47b41a79ab5e8faec9aea6c4a06c4d1e4d1132f</id>
<content type='text'>
Not sure what that should originally been good for, but it doesn't seem
to make any sense any more.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Backmerge tag 'v4.13-rc5' into drm-next</title>
<updated>2017-08-15T06:16:58Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-08-15T06:16:58Z</published>
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<id>urn:sha1:0c697fafc66830ca7d5dc19123a1d0641deaa1f6</id>
<content type='text'>
Linux 4.13-rc5

There's a really nasty nouveau collision, hopefully someone can take a look
once I pushed this out.
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix undue fallthroughs in golden registers initialization</title>
<updated>2017-08-02T18:29:42Z</updated>
<author>
<name>Jean Delvare</name>
<email>jdelvare@suse.de</email>
</author>
<published>2017-07-30T08:18:25Z</published>
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<id>urn:sha1:5694785cf09bf0e7bd8e5f62361ea34fa162a4a0</id>
<content type='text'>
As I was staring at the si_init_golden_registers code, I noticed that
the Pitcairn initialization silently falls through the Cape Verde
initialization, and the Oland initialization falls through the Hainan
initialization. However there is no comment stating that this is
intentional, and the radeon driver doesn't have any such fallthrough,
so I suspect this is not supposed to happen.

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10")
Cc: Ken Wang &lt;Qingqing.Wang@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Marek Olšák" &lt;maraeo@gmail.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: Flora Cui &lt;Flora.Cui@amd.com&gt;
Reviewed-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
</feed>
