<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2017-12-13T22:28:07Z</updated>
<entry>
<title>drm/amdgpu: convert nbio to use callbacks (v2)</title>
<updated>2017-12-13T22:28:07Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-12-08T18:07:58Z</published>
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<id>urn:sha1:bf383fb64e7c8ccc96d382e38e829737389708a7</id>
<content type='text'>
Cleans up and consolidates all of the per-asic logic.

v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array</title>
<updated>2017-12-08T16:18:51Z</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2017-11-28T22:01:21Z</published>
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<id>urn:sha1:946a4d5b301028621791e6c8b53f64c426dea1a5</id>
<content type='text'>
Handle dynamic offsets correctly in static arrays.

Acked-by: Christian Konig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>amdgpu/nbio: use constant nbio_hdp_flush_reg structs.</title>
<updated>2017-09-29T16:24:39Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-09-29T00:47:43Z</published>
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<id>urn:sha1:c6622f3afcb4da90e2600ee98e91a8a5640f7a27</id>
<content type='text'>
This removes the init path as well, since the init path
just did some constant init of some structs.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>amdgpu/soc15: make the pcie index/data registers constant.</title>
<updated>2017-09-29T16:24:38Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-09-29T00:08:01Z</published>
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<id>urn:sha1:35b31f7c6464480b10f3a54c9a35699e02f17ae8</id>
<content type='text'>
These don't seem to change at runtime, and the initialisers
are constant data. This could be improved by not selecting
the apu/non-apu path on each pcie read/write access.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add nbio7 support</title>
<updated>2017-05-24T21:41:16Z</updated>
<author>
<name>Chunming Zhou</name>
<email>David1.Zhou@amd.com</email>
</author>
<published>2017-05-04T18:59:54Z</published>
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<id>urn:sha1:954d5d437f228e28289ecd5b023abc6fcc9d9aff</id>
<content type='text'>
NBIO handles misc bus io functions on the chip.  This
helper lib has the apppropriate functions for NBIO 7.0.

Signed-off-by: Chunming Zhou &lt;David1.Zhou@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
