<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2018-02-27T04:09:36Z</updated>
<entry>
<title>drm/amdgpu: use the TTM dummy page instead of allocating one</title>
<updated>2018-02-27T04:09:36Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-02-22T07:35:11Z</published>
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<id>urn:sha1:92e71b0676447fff40c1e747b2585a9d11c5fca2</id>
<content type='text'>
We have a global dummy page in TTM, use that one instead of allocating a
new one.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: separate PASID mapping from VM flush v2</title>
<updated>2018-02-19T19:20:18Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-02-04T09:32:35Z</published>
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<id>urn:sha1:c633c00bf06779ec6d5e2c01748d4753ede98f8a</id>
<content type='text'>
Stuffing the PASID mapping into the VM flush isn't flexible enough since
the PASID mapping changes not as often as we need a VM flush.

v2: add missing use of gmc_v7_0_emit_pasid_mapping

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: apply top reserved VA space to pre Vega10 as well</title>
<updated>2018-02-19T19:18:30Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-22T10:19:50Z</published>
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<id>urn:sha1:a3e9a15a25d5dfaacdf4d6a367eba27df83d108a</id>
<content type='text'>
Reserve VA space at the top for older generations as well.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Monk Liu &lt;monk.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add PASID mapping for GMC v7</title>
<updated>2018-02-19T19:18:10Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-16T19:24:55Z</published>
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<id>urn:sha1:0da63bbb5ba6050fcd1595a59645840cf9fd7a24</id>
<content type='text'>
This way we can see the PASID in VM faults.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement gmc_v7_0_emit_flush_gpu_tlb</title>
<updated>2018-02-19T19:18:08Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-12T16:08:22Z</published>
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<id>urn:sha1:d9a701ccd6dafc30f48ad8c1b7d8ab4477547707</id>
<content type='text'>
Unify tlb flushing for gmc v7.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move struct gart_funcs into amdgpu_gmc.h</title>
<updated>2018-02-19T19:17:44Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-12T14:26:08Z</published>
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<id>urn:sha1:132f34e4b558488cc8d153a1d18833054a76e44c</id>
<content type='text'>
And rename it to struct gmc_funcs.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h</title>
<updated>2018-02-19T19:17:43Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-12T13:52:22Z</published>
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<id>urn:sha1:770d13b19fdf365a99e559f1d47f1380910a947d</id>
<content type='text'>
And rename it to amdgpu_gmc as well.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: print the PASID with VM faults on GMC v7</title>
<updated>2018-02-19T19:17:42Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-09T18:49:21Z</published>
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<id>urn:sha1:a9f7cd1b0b34adf246b62444fe13624ff6f1fce4</id>
<content type='text'>
Print that extra information on GMC v7.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: adjust HDP write queue flushing for tlb invalidation</title>
<updated>2018-02-19T19:17:14Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-01-05T15:25:57Z</published>
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<id>urn:sha1:b1d128689f9c602a3dbea37b47a27a568d55754d</id>
<content type='text'>
Separate tlb invalidation and hdp flushing and move the HDP
flush to the caller.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: only enable swiotlb alloc when need v2</title>
<updated>2018-02-13T18:33:32Z</updated>
<author>
<name>Chunming Zhou</name>
<email>david1.zhou@amd.com</email>
</author>
<published>2018-02-09T02:44:09Z</published>
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<id>urn:sha1:fd5fd480dd8fe4910546e7b080b3ae345e57fe9f</id>
<content type='text'>
get the max io mapping address of system memory to see if it is over
our card accessing range.
v2: move checking later

Signed-off-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Monk Liu &lt;monk.liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-2-david1.zhou@amd.com
</content>
</entry>
</feed>
