<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2018-04-03T18:08:44Z</updated>
<entry>
<title>drm/amdgpu: Add support for SRBM selection v3</title>
<updated>2018-04-03T18:08:44Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-03-29T13:09:39Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f7a9ee81a88b83915e7c15895c507abede44b0c5'/>
<id>urn:sha1:f7a9ee81a88b83915e7c15895c507abede44b0c5</id>
<content type='text'>
Also remove code duplication in write and read regs functions.
This also fixes potential missing unlock in amdgpu_debugfs_regs_write
in case get_user would fail.

v2: Add SRBM mutex locking.
v3: Fix TO counter and fix comment location.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix KIQ hang on bare metal for device unbind/bind back v2.</title>
<updated>2018-04-03T17:52:58Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-03-28T12:01:53Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=326aa996a6681dca76477337b66f5e303aa8953e'/>
<id>urn:sha1:326aa996a6681dca76477337b66f5e303aa8953e</id>
<content type='text'>
Problem: When unbind and then bind back the device KIQ hangs on Vega
after mapping KCQs request.

Fix: Adding deinitialzie code from CAIL  during HW fini solves the
hang.

v2: use srbm_mutex around soc15_grbm_select()

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx9: add golden setting for vega12 (v3)</title>
<updated>2018-03-21T19:36:51Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2018-03-12T06:55:48Z</published>
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<id>urn:sha1:62b35f9ad107cb0ddc96dd8c1bb24c21a1adc546</id>
<content type='text'>
Add gfx9_2_1 golden setting.

v2: switch to soc15_program_register_sequence for
golden setting programming
v3: squash in additional golden updates

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Ken Wang &lt;ken.wang@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx9: add clockgating support for vega12</title>
<updated>2018-03-21T19:36:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-09-02T06:26:50Z</published>
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<id>urn:sha1:23862464f806ceab84854ba2422774b29a7225bc</id>
<content type='text'>
Same as vega10 and raven.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx9: add support for vega12</title>
<updated>2018-03-21T19:36:50Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-09-02T06:26:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=8b399477554b918eed48c7048bf9b11c4d3782d3'/>
<id>urn:sha1:8b399477554b918eed48c7048bf9b11c4d3782d3</id>
<content type='text'>
Same as vega10 and raven.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx9: add gfx config for vega12</title>
<updated>2018-03-21T19:36:50Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-09-02T06:24:39Z</published>
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<id>urn:sha1:e5c62eddd10d0428d9102b4864cc4322749a7c41</id>
<content type='text'>
Just a place holder for now.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx9: Add placeholder for vega12 golden settings</title>
<updated>2018-03-21T19:36:49Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-09-02T06:22:49Z</published>
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<id>urn:sha1:d5e8ef06485d4d2a1ed1bd03b259191a3022473d</id>
<content type='text'>
Fill these in when we get them.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx9: add support for vega12 firmware</title>
<updated>2018-03-21T19:36:49Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-09-02T06:10:18Z</published>
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<id>urn:sha1:739ffd9b47aed90470abe36c9344881ca5ff6d24</id>
<content type='text'>
Declare and fetch the appriopriate files.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move IH clientid defs to separate file</title>
<updated>2018-03-14T20:16:35Z</updated>
<author>
<name>Oak Zeng</name>
<email>Oak.Zeng@amd.com</email>
</author>
<published>2018-03-08T21:44:47Z</published>
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<id>urn:sha1:3760f76cbebb455deaaa3e64ad5feb25222e65a9</id>
<content type='text'>
This is preparation for sharing client ID definitions
between amdgpu and amdkfd

Signed-off-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: disable GFX ring and disable PQ wptr in hw_fini</title>
<updated>2018-02-28T19:18:08Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2018-01-29T11:24:32Z</published>
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<id>urn:sha1:9f0178fb67699992d38601cb923b434f9986dd68</id>
<content type='text'>
otherwise there will be DMAR reading error comes out from CP since
GFX is still alive and CPC's WPTR_POLL is still enabled, which would
lead to DMAR read error.

fix:
we can hault CPG after hw_fini, but cannot halt CPC becaues KIQ
stil need to be alive to let RLCV invoke, but its WPTR_POLL could
be disabled.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
