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<title>kernel/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2017-05-31T20:48:48Z</updated>
<entry>
<title>drm/amdgpu: unify MQD programming sequence for kfd and amdgpu v2</title>
<updated>2017-05-31T20:48:48Z</updated>
<author>
<name>Andres Rodriguez</name>
<email>andresx7@gmail.com</email>
</author>
<published>2017-02-01T21:37:42Z</published>
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<id>urn:sha1:97bf47b21d593c92d8c89be159afccb5d6562279</id>
<content type='text'>
Use the same gfx_*_mqd_commit function for kfd and amdgpu codepaths.

This removes the last duplicates of this programming sequence.

v2: fix cp_hqd_pq_wptr value

Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Andres Rodriguez &lt;andresx7@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rework IP block registration (v2)</title>
<updated>2016-10-25T18:38:45Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-10-13T21:41:13Z</published>
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<id>urn:sha1:a12551072126758ecb0743147054f22bf233bb7d</id>
<content type='text'>
This makes it easier to replace specific IP blocks on
asics for handling virtual_dce, DAL, etc. and for building
IP lists for hw or tables.  This also stored the status
information in the same structure.

v2: split out spelling fix into a separate patch
    add a function to add IPs to the list

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx8: remove stale function declaration</title>
<updated>2016-08-08T15:32:58Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-08-01T18:29:15Z</published>
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<id>urn:sha1:309889098c6095cf4c1247724c22c2943807da20</id>
<content type='text'>
This got leftover somehow when I cleaned this up.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move get_gpu_clock_counter into the gfx struct</title>
<updated>2016-07-07T19:01:42Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-07-07T19:01:42Z</published>
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<id>urn:sha1:b95e31fddabbc38f96c8e991dd7132cea252bf7d</id>
<content type='text'>
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fetch cu_info once at init</title>
<updated>2016-05-11T16:31:21Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-05-03T20:25:53Z</published>
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<id>urn:sha1:7dae69a2905c34a97678645c8e4c95095f5390b8</id>
<content type='text'>
Fetch this info once at init and just store the results
for future requests.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)</title>
<updated>2015-06-04T01:03:51Z</updated>
<author>
<name>yanyang1</name>
<email>young.yang@amd.com</email>
</author>
<published>2015-05-22T18:39:35Z</published>
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<id>urn:sha1:5fc3aeeb9e553a20ce62544f7176c6c4aca52d71</id>
<content type='text'>
The structure is renamed and moved to amd_shared.h to make
the component independent.  This makes it easier to add
new components in the future.

v2: fix include path

Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Signed-off-by: yanyang1 &lt;young.yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add initial VI support</title>
<updated>2015-06-04T01:03:17Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-04-20T21:31:14Z</published>
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<id>urn:sha1:aaa36a976bbb9b02a54c087ff390c0bad1d18e3e</id>
<content type='text'>
This adds initial support for VI asics.  This
includes Iceland, Tonga, and Carrizo.  Our inital
focus as been Carrizo, so there are still gaps in
support for Tonga and Iceland, notably power
management.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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