<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2018-04-03T18:08:44Z</updated>
<entry>
<title>drm/amdgpu: Add support for SRBM selection v3</title>
<updated>2018-04-03T18:08:44Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-03-29T13:09:39Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f7a9ee81a88b83915e7c15895c507abede44b0c5'/>
<id>urn:sha1:f7a9ee81a88b83915e7c15895c507abede44b0c5</id>
<content type='text'>
Also remove code duplication in write and read regs functions.
This also fixes potential missing unlock in amdgpu_debugfs_regs_write
in case get_user would fail.

v2: Add SRBM mutex locking.
v3: Fix TO counter and fix comment location.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: separate PASID mapping from VM flush v2</title>
<updated>2018-02-19T19:20:18Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-02-04T09:32:35Z</published>
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<id>urn:sha1:c633c00bf06779ec6d5e2c01748d4753ede98f8a</id>
<content type='text'>
Stuffing the PASID mapping into the VM flush isn't flexible enough since
the PASID mapping changes not as often as we need a VM flush.

v2: add missing use of gmc_v7_0_emit_pasid_mapping

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove now superflous *_hdp operation</title>
<updated>2018-02-19T19:18:22Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-19T14:19:16Z</published>
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<id>urn:sha1:2ee150cda7bdc766cf9baca3534f3a2c0b0e8357</id>
<content type='text'>
All HDP invalidation and most flush can now be replaced by the generic
ASIC function.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement gmc_v6_0_emit_flush_gpu_tlb</title>
<updated>2018-02-19T19:18:08Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-12T15:58:18Z</published>
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<id>urn:sha1:4fef88bd002985908064ea6760623f09ac44355b</id>
<content type='text'>
Unify tlb flushing for gmc v6.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: wire up emit_wreg for gfx v6</title>
<updated>2018-02-19T19:18:00Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-12T15:30:19Z</published>
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<id>urn:sha1:e18fb1fd34f1db4347dd43a8ade7ece84e0aa30d</id>
<content type='text'>
Needed for vm_flush unification.

v2: handle compute rings as well.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: forward pasid to backend flush implementations</title>
<updated>2018-02-19T19:17:47Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-08T13:48:11Z</published>
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<id>urn:sha1:5a4633c4b880cf8d1fe7df9c55766205cf9bc295</id>
<content type='text'>
rd the pasid from the VM code to the emit_vm_flush function and update
all implementations with the new parameter.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename vm_id to vmid</title>
<updated>2017-12-27T16:34:02Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-12-18T16:08:25Z</published>
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<id>urn:sha1:c4f46f22c448ff571eb8fdbe4ab71a25805228d1</id>
<content type='text'>
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx6: use cached values for raster config in clear state</title>
<updated>2017-12-06T17:47:47Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-11-13T20:48:37Z</published>
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<id>urn:sha1:56f3df448c9458ffd4c2ae62c09afc99f7ab277d</id>
<content type='text'>
Use the cached values rather than hardcoding it.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: change redundant init logs to debug level</title>
<updated>2017-12-04T21:33:12Z</updated>
<author>
<name>pding</name>
<email>Pixel.Ding@amd.com</email>
</author>
<published>2017-10-26T01:30:38Z</published>
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<id>urn:sha1:9953b72f9c9cb7733334753788faab33ccc4dc0a</id>
<content type='text'>
When this VF stays in exclusive mode for long, other VFs will be
impacted.

The redundant messages causes exclusive mode timeout when they're
redirected. That is a normal use case for cloud service to redirect
guest log to virtual serial port.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: pding &lt;Pixel.Ding@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: revert tile table update for oland</title>
<updated>2017-09-14T18:22:57Z</updated>
<author>
<name>Jean Delvare</name>
<email>jdelvare@suse.de</email>
</author>
<published>2017-09-11T15:43:56Z</published>
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<id>urn:sha1:4cf97582b46f123a4b7cd88d999f1806c2eb4093</id>
<content type='text'>
Several users have complained that the tile table update broke Oland
support. Despite several attempts to fix it, the root cause is still
unknown at this point and no solution is available. As it is not
acceptable to leave a known regression breaking a major functionality
in the kernel for several releases, let's just reverse this
optimization for now. It can be implemented again later if and only
if the breakage is understood and fixed.

As there were no complaints for Hainan so far, only the Oland part of
the offending commit is reverted. Optimization is preserved on
Hainan, so this commit isn't an actual revert of the original.

This fixes bug #194761:
https://bugzilla.kernel.org/show_bug.cgi?id=194761

Reviewed-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Fixes: f8d9422ef80c ("drm/amdgpu: update tile table for oland/hainan")
Cc: Flora Cui &lt;Flora.Cui@amd.com&gt;
Cc: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Marek Olšák &lt;maraeo@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
</feed>
