kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h, branch linux-4.17.y

drm/amdgpu: Add KFD eviction fence

2018-02-07T01:32:35Z

This fence is used by KFD to keep memory resident while user mode queues are enabled. Trying to evict memory will trigger the enable_signaling callback, which starts a KFD eviction, which involves preempting user mode queues before signaling the fence. There is one such fence per process. v2: * Grab a reference to mm_struct * Dereference fence after NULL check * Simplify fence release, no need to signal without anyone waiting * Added signed-off-by Harish, who is the original author of this code v3: * update MAINTAINERS file * change amd_kfd_ prefix to amdkfd_ * remove useless initialization of variable to NULL v4: * set amdkfd_fence_ops to be static * Suggested by: Fengguang Wu Signed-off-by: Harish Kasiviswanathan Signed-off-by: Felix Kuehling Reviewed-by: Oded Gabbay Signed-off-by: Oded Gabbay

drm/amdgpu: Fix header file dependencies

2018-02-07T01:32:32Z

Signed-off-by: Felix Kuehling Reviewed-by: Christian König Signed-off-by: Oded Gabbay

drm/amdgpu: separate PASID mapping from VM flush v2

2018-02-19T19:20:18Z

Stuffing the PASID mapping into the VM flush isn't flexible enough since the PASID mapping changes not as often as we need a VM flush. v2: add missing use of gmc_v7_0_emit_pasid_mapping Signed-off-by: Christian König Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher

drm/amdgpu: cache the fence to wait for a VMID

2018-02-19T19:19:18Z

Beneficial when a lot of processes are waiting for VMIDs. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: add new emit_reg_wait callback

2018-02-19T19:19:08Z

Allows us to wait for a register value/mask on a ring. Signed-off-by: Christian König Reviewed-by: Felix Kuehling Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: remove now superflous *_hdp operation

2018-02-19T19:18:22Z

All HDP invalidation and most flush can now be replaced by the generic ASIC function. Signed-off-by: Christian König Acked-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: forward pasid to backend flush implementations

2018-02-19T19:17:47Z

rd the pasid from the VM code to the emit_vm_flush function and update all implementations with the new parameter. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: rename vm_id to vmid

2017-12-27T16:34:02Z

sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: use polling mem to set SDMA3 wptr for VF

2017-12-12T19:45:47Z

On Tonga VF, there're 2 sources updating wptr registers for sdma3: 1) polling mem and 2) doorbell. When doorbell and polling mem are both enabled on sdma3, there will be collision hit in occasion between those two sources when ucode and h/w are doing the updating on wptr register in parallel. Issue doesn't happen on CP GFX/Compute since CP drops all doorbell writes when VF is inactive. So enable polling mem and don't use doorbell for SDMA3. Signed-off-by: Pixel Ding Reviewed-by: Monk Liu Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm: move amd_gpu_scheduler into common location

2017-12-07T16:51:56Z

This moves and renames the AMDGPU scheduler to a common location in DRM in order to facilitate re-use by other drivers. This is mostly a straight forward rename with no code changes. One notable exception is the function to_drm_sched_fence(), which is no longer a inline header function to avoid the need to export the drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures. Reviewed-by: Chunming Zhou Tested-by: Dieter Nützel Acked-by: Alex Deucher Signed-off-by: Lucas Stach Signed-off-by: Alex Deucher