<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h, branch 0x221E-v0.0-v7.0</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=0x221E-v0.0-v7.0</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=0x221E-v0.0-v7.0'/>
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<updated>2020-08-14T20:22:41Z</updated>
<entry>
<title>drm/amd/pm: optimize the power related source code layout</title>
<updated>2020-08-14T20:22:41Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-08-13T08:39:25Z</published>
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<id>urn:sha1:e098bc9612c2b60f94920461d71c92962a916e73</id>
<content type='text'>
The target is to provide a clear entry point(for power routines).
Also this can help to maintain a clear view about the frameworks
used on different ASICs. Hopefully all these can make power part
more friendly to play with.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: put those exposed power interfaces in amdgpu_dpm.c</title>
<updated>2020-08-14T20:22:41Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-08-13T05:37:52Z</published>
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<id>urn:sha1:e9372d23715d6802fd6d3763cb19c5a0c07ad641</id>
<content type='text'>
As other power interfaces.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix device attribute node create failed with multi gpu</title>
<updated>2020-05-26T19:51:45Z</updated>
<author>
<name>Kevin Wang</name>
<email>kevin1.wang@amd.com</email>
</author>
<published>2020-05-22T14:06:17Z</published>
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<id>urn:sha1:ba02fd6b1ce5536ad8d052468166dd9eb083c2b9</id>
<content type='text'>
the origin design will use varible of "attr-&gt;states" to save node
supported states on current gpu device, but for multi gpu device, when
probe second gpu device, the driver will check attribute node states
from previous gpu device wthether to create attribute node.
it will cause other gpu device create attribute node faild.

1. add member attr_list into amdgpu_device to link supported device attribute node.
2. add new structure "struct amdgpu_device_attr_entry{}" to track device attribute state.
3. drop member "states" from amdgpu_device_attr.

v2:
1. move "attr_list" into amdgpu_pm and rename to "pm_attr_list".
2. refine create &amp; remove device node functions parameter.

fix:
drm/amdgpu: optimize amdgpu device attribute code

Signed-off-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: optimize amdgpu device attribute code</title>
<updated>2020-05-18T15:24:15Z</updated>
<author>
<name>Kevin Wang</name>
<email>kevin1.wang@amd.com</email>
</author>
<published>2020-04-27T15:45:49Z</published>
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<id>urn:sha1:4e01847c38f7a5e2b0ffa8ff74d6bf0e85924240</id>
<content type='text'>
unified amdgpu device attribute node functions:
1. add some helper functions to create amdgpu device attribute node.
2. create device node according to device attr flags on different VF mode.
3. rename some functions name to adapt a new interface.

v2:
1. remove ATTR_STATE_DEAD, ATTR_STATE_ALIVE enum.
2. rename callback function perform to attr_update.
3. modify some variable names

Signed-off-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: move debugfs init into core amdgpu debugfs</title>
<updated>2020-02-26T19:21:12Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-02-04T17:46:56Z</published>
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<id>urn:sha1:a4c5b1bb7b93b6014c066cd3ff3ce8d3861f922f</id>
<content type='text'>
In order to remove the load and unload drm callbacks,
we need to reorder the init sequence to move all the drm
debugfs file handling.  Do this for pm.

Tested-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable JPEG2.0 dpm</title>
<updated>2019-11-19T15:12:50Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-11-12T16:57:36Z</published>
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<id>urn:sha1:474b6d296f237da1b05d5ef8749c3d7ab9f87682</id>
<content type='text'>
By using its own enabling function

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: register pm sysfs for sriov (v2)</title>
<updated>2019-06-13T18:59:48Z</updated>
<author>
<name>Yintian Tao</name>
<email>yttao@amd.com</email>
</author>
<published>2019-06-05T12:40:08Z</published>
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<id>urn:sha1:e9bc1bf7916e006f62a27f400f74a6e10b874886</id>
<content type='text'>
we need register pm sysfs for virt in order
to support dpm level modification because
smu ip block will not be added under SRIOV

v2: whitespace fixes (Alex)

Signed-off-by: Yintian Tao &lt;yttao@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: add RLC firmware to support raven1 refresh</title>
<updated>2019-06-11T17:40:06Z</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2019-05-27T08:05:50Z</published>
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<id>urn:sha1:80f41f84ae2c99ff2fd88163f2293f86c3c68af1</id>
<content type='text'>
Use SMU firmware version to indentify the raven1 refresh device and
then load homologous RLC FW.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Suggested-by: Huang Rui&lt;Ray.Huang@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix amdgpu_pm_acpi_event_handler warning</title>
<updated>2017-08-15T18:46:06Z</updated>
<author>
<name>Jean Delvare</name>
<email>jdelvare@suse.de</email>
</author>
<published>2017-07-30T11:42:55Z</published>
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<id>urn:sha1:98c65108c5929f3349897ac937bd814b67c62147</id>
<content type='text'>
Include a missing header to get rid of the following warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:65:6: warning: no previous prototype for ‘amdgpu_pm_acpi_event_handler’ [-Wmissing-prototypes]
 void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
      ^

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add parse clock gating state</title>
<updated>2017-01-27T16:13:07Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2017-01-05T11:17:13Z</published>
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<id>urn:sha1:a8503b15ab770967c13bc61ae8a2216165c9760a</id>
<content type='text'>
Suggested-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: William Lewis &lt;minutemaidpark@hotmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
