kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c, branch 0x221E-v0.0-v7.0Hosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=0x221E-v0.0-v7.02020-08-14T20:22:41Zdrm/amd/pm: optimize the power related source code layout2020-08-14T20:22:41ZEvan Quanevan.quan@amd.com2020-08-13T08:39:25Zurn:sha1:e098bc9612c2b60f94920461d71c92962a916e73
The target is to provide a clear entry point(for power routines).
Also this can help to maintain a clear view about the frameworks
used on different ASICs. Hopefully all these can make power part
more friendly to play with.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: put those exposed power interfaces in amdgpu_dpm.c2020-08-14T20:22:41ZEvan Quanevan.quan@amd.com2020-08-13T05:37:52Zurn:sha1:e9372d23715d6802fd6d3763cb19c5a0c07ad641
As other power interfaces.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: optimize i2c bus access implementation2020-08-14T20:22:41ZEvan Quanevan.quan@amd.com2020-08-13T03:51:11Zurn:sha1:20d3c28ce4e28ac4df9d139054aecb65ee5a9ee4
The caller needs not care about the internal details how the powerplay
API implemented.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: optimize amdgpu_dpm_set_clockgating_by_smu() implementation2020-08-14T20:22:41ZEvan Quanevan.quan@amd.com2020-08-12T05:11:24Zurn:sha1:b89e9eb681653868e3ecb0287f1cf65aaec853da
Cover the implementation details from outside(of power part).
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: enable swSMU mgpu fan boost support2020-08-14T20:22:40ZEvan Quanevan.quan@amd.com2020-08-12T04:08:56Zurn:sha1:9f979a49e23f4b87d038708e06ea6d320e198e71
Enable mgpu fan boost feature on swSMU routines.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: optimize the interface for mgpu fan boost enablement2020-08-14T20:22:40ZEvan Quanevan.quan@amd.com2020-08-12T03:53:47Zurn:sha1:f10bb940d8d2774fedc63c4dfb975e4310a261cd
Cover the implementation details from outside(of power). Also preparing
for expanding this to swSMU.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: add SMU mode1 reset2020-07-15T16:41:32ZWenhui ShengWenhui.Sheng@amd.com2020-07-10T09:39:24Zurn:sha1:ea8139d8d59bd6f014b317e7423345169a56fe49
From PM FW 58.26.0 for sienna cichlid, SMU mode1 reset
is support, driver sends PPSMC_MSG_Mode1Reset message
to PM FW could trigger this reset.
v2: add mode1 reset dpm interface
v3: change maro name
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: revise calling chain on retrieving frequency range2020-07-10T21:42:29ZEvan Quanevan.quan@amd.com2020-06-09T08:16:56Zurn:sha1:e5ef784b1e1736ae1e90872217b95f4529dfa422
This helps to maintain clear code layers and drop unnecessary
parameter.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmu2020-05-28T18:00:49ZKevin Wangkevin1.wang@amd.com2020-05-20T03:25:23Zurn:sha1:d2d0f8f4554da1cdbd90c78bff18cb576176d0a7
the vega20 asic uses legacy powerplay driver by default.
1. cleanup is_support_sw_smu_xgmi() function.
(only use for vega20 xgmi pstate check)
2. by default, the vega20 set xgmi pstate by legacy powerplay routine.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add DPM function for XGMI link power down control2020-05-14T21:42:27ZJohn Clementsjohn.clements@amd.com2020-05-13T09:45:57Zurn:sha1:5e7067b24fcf1549c72988dd92de6d17ff3d2077
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>