<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2018-07-25T09:26:09Z</updated>
<entry>
<title>drm/amdgpu: Reserve VM root shared fence slot for command submission (v3)</title>
<updated>2018-07-25T09:26:09Z</updated>
<author>
<name>Michel Dänzer</name>
<email>michel.daenzer@amd.com</email>
</author>
<published>2018-06-25T09:07:17Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e11afb7badb8bb3747128f09bf3ff68d1a20f630'/>
<id>urn:sha1:e11afb7badb8bb3747128f09bf3ff68d1a20f630</id>
<content type='text'>
commit ed6b4b5559769c6c5a0fcb3fac8a9e1f4e58c4ae upstream.

Without this, there could not be enough slots, which could trigger the
BUG_ON in reservation_object_add_shared_fence.

v2:
* Jump to the error label instead of returning directly (Jerry Zhang)
v3:
* Reserve slots for command submission after VM updates (Christian König)

Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/106418
Reported-by: mikhail.v.gavrilov@gmail.com
Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/ttm: use bit flag to replace allow_reserved_eviction in ttm_operation_ctx</title>
<updated>2018-02-27T04:09:34Z</updated>
<author>
<name>Roger He</name>
<email>Hongbo.He@amd.com</email>
</author>
<published>2018-02-06T03:22:57Z</published>
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<id>urn:sha1:d330fca11500bebaf7f25b60b7b087bbe8ad0b7f</id>
<content type='text'>
for saving memory and more bit flag can be used in future

Signed-off-by: Roger He &lt;Hongbo.He@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix always_valid bos multiple LRU insertions.</title>
<updated>2018-02-19T19:19:13Z</updated>
<author>
<name>Bas Nieuwenhuizen</name>
<email>basni@chromium.org</email>
</author>
<published>2018-01-31T12:58:55Z</published>
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<id>urn:sha1:a20ee0b1f8b42e2568f3a4408003d22b2dfcc706</id>
<content type='text'>
If these bos are evicted and are in the validated list
things blow up, so do not put them in there. Notably,
that tries to add the bo to the LRU twice, which results
in a BUG_ON in ttm_bo.c.

While for the bo_list an alternative would be to not allow
always valid bos in there, that does not work for the user
fence.

v2: Fixed whitespace issue pointed out by checkpatch.pl

Signed-off-by: Bas Nieuwenhuizen &lt;basni@chromium.org&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h</title>
<updated>2018-02-19T19:17:43Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-01-12T13:52:22Z</published>
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<id>urn:sha1:770d13b19fdf365a99e559f1d47f1380910a947d</id>
<content type='text'>
And rename it to amdgpu_gmc as well.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: update VM PDs after the PTs</title>
<updated>2018-01-10T20:44:53Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-09-01T18:37:57Z</published>
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<id>urn:sha1:0abc6878fc2d6990d8b0851b55d3c77ecfdd74e6</id>
<content type='text'>
Necessary for the next patch.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set allow_reserved_eviction and resv when bo allocation and cs</title>
<updated>2017-12-15T22:10:54Z</updated>
<author>
<name>Roger He</name>
<email>Hongbo.He@amd.com</email>
</author>
<published>2017-12-08T05:31:52Z</published>
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<id>urn:sha1:9251859a9adb8e5906402acc9d705149d937bf8b</id>
<content type='text'>
enable eviction of other per VM BOs during allocation and allows
reaping of deleted BOs during CS.

Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Roger He &lt;Hongbo.He@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm: move amd_gpu_scheduler into common location</title>
<updated>2017-12-07T16:51:56Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2017-12-06T16:49:39Z</published>
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<id>urn:sha1:1b1f42d8fde4fef1ed7873bf5aa91755f8c3de35</id>
<content type='text'>
This moves and renames the AMDGPU scheduler to a common location in DRM
in order to facilitate re-use by other drivers. This is mostly a straight
forward rename with no code changes.

One notable exception is the function to_drm_sched_fence(), which is no
longer a inline header function to avoid the need to export the
drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures.

Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Tested-by: Dieter Nützel &lt;Dieter@nuetzel-hh.de&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Get rid of dep_sync as a seperate object.</title>
<updated>2017-12-06T17:48:31Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2017-11-13T19:47:52Z</published>
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<id>urn:sha1:cebb52b7bc325863600aff930407bba773010938</id>
<content type='text'>
Instead mark fence as explicit in it's amdgpu_sync_entry.

v2:
Fix use after free bug and add new parameter description.
Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix VA hole handling on Vega10 v3</title>
<updated>2017-12-06T17:48:05Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-11-06T14:37:01Z</published>
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<id>urn:sha1:bb7939b2030ab55acd203c86160c37db22f5796a</id>
<content type='text'>
Similar to the CPU address space the VA on Vega10 has a hole in it.

v2: use dev_dbg instead of dev_err
v3: add some more comments to explain how the hw works

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use the new TTM bytes moved counter v2</title>
<updated>2017-12-06T17:48:04Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-04-27T16:20:47Z</published>
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<id>urn:sha1:6af046d26f34278eacd6ecddb37170624f6d4251</id>
<content type='text'>
Instead of the global statistics use the per context bytes moved counter.

v2: rebased

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Tested-by: Dieter Nützel &lt;Dieter@nuetzel-hh.de&gt;
Tested-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
