<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/firmware/tegra/bpmp.c, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2023-10-13T12:20:27Z</updated>
<entry>
<title>firmware: tegra: Add suspend hook and reset BPMP IPC early on resume</title>
<updated>2023-10-13T12:20:27Z</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2023-10-09T10:05:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ea608a01d4ee66f8b51070e623f9adb8684c0dd4'/>
<id>urn:sha1:ea608a01d4ee66f8b51070e623f9adb8684c0dd4</id>
<content type='text'>
Add suspend hook and a 'suspended' field in the 'struct tegra_bpmp'
to mark if BPMP is suspended. Also, add a 'flags' field in the
'struct tegra_bpmp_message' whose 'TEGRA_BPMP_MESSAGE_RESET' bit can be
set from the Tegra MC driver to signal that the reset of BPMP IPC
channels is required before sending MRQ to the BPMP FW. Together both
the fields allow us to handle any requests that might be sent too soon
as they can cause hang during system resume.

One case where we see BPMP requests being sent before the BPMP driver
has resumed is the memory bandwidth requests which are triggered by
onlining the CPUs during system resume. The CPUs are onlined before the
BPMP has resumed and we need to reset the BPMP IPC channels to handle
these requests.

The additional check for 'flags' is done to avoid any un-intended BPMP
IPC reset if the tegra_bpmp_transfer*() API gets called during suspend
sequence after the BPMP driver is suspended.

Fixes: f41e1442ac5b ("cpufreq: tegra194: add OPP support and set bandwidth")
Co-developed-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: Explicitly include correct DT includes</title>
<updated>2023-08-12T08:31:01Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-08-03T22:42:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5b45759c0b58ade7c6a552fb58f2ce74ebaab053'/>
<id>urn:sha1:5b45759c0b58ade7c6a552fb58f2ce74ebaab053</id>
<content type='text'>
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Link: https://lore.kernel.org/r/20230803-dt-header-cleanups-for-soc-v2-17-d8de2cc88bff@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: bpmp: Add support for DRAM MRQ GSCs</title>
<updated>2023-06-09T15:17:23Z</updated>
<author>
<name>Peter De Schrijver</name>
<email>pdeschrijver@nvidia.com</email>
</author>
<published>2023-05-08T12:20:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2abd484ca48f2e160c8d9c7241627c34855b621e'/>
<id>urn:sha1:2abd484ca48f2e160c8d9c7241627c34855b621e</id>
<content type='text'>
Implement support for DRAM MRQ GSCs.

Signed-off-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
[treding@nvidia.com: drop unnecessary discrimination enum]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: Use of_property_present() for testing DT property presence</title>
<updated>2023-04-04T19:51:23Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-03-10T14:47:04Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=8c47b8253f4cfd8b4dbda8c9adc1d0b1d7f3009d'/>
<id>urn:sha1:8c47b8253f4cfd8b4dbda8c9adc1d0b1d7f3009d</id>
<content type='text'>
It is preferred to use typed property access functions (i.e.
of_property_read_&lt;type&gt; functions) rather than low-level
of_get_property/of_find_property functions for reading properties. As
part of this, convert of_get_property/of_find_property calls to the
recently added of_property_present() helper when we just want to test
for presence of a property and nothing more.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: bpmp: Do not support big-endian</title>
<updated>2022-10-24T13:18:23Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2022-09-22T13:41:25Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=228722c519644f8fee2ef75fe8e9d53cd40a3c6c'/>
<id>urn:sha1:228722c519644f8fee2ef75fe8e9d53cd40a3c6c</id>
<content type='text'>
The CPU and BPMP inter-processor communication code is only partially
endian-aware, so it doesn't work properly when run on a big-endian CPU
anyway. Running Tegra SoCs in big-endian mode has also never been
supported, especially not on those with 64-bit ARM processors.

If big-endian support ever becomes necessary this can be added back but
will need additional fixes for completeness.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: bpmp: Use iosys-map helpers</title>
<updated>2022-10-24T13:18:11Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2022-09-22T13:41:24Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4c1e0a97351a5e88e7e503b40cdbe0f220039a5e'/>
<id>urn:sha1:4c1e0a97351a5e88e7e503b40cdbe0f220039a5e</id>
<content type='text'>
The shared memory used for inter-processor communication between the CPU
and the BPMP can reside either in system memory or in I/O memory. Use
the iosys-map helpers to abstract these differences away.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: bpmp: Do only aligned access to IPC memory area</title>
<updated>2022-06-24T15:57:29Z</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2022-06-22T13:22:59Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a4740b148a04dc60e14fe6a1dfe216d3bae214fd'/>
<id>urn:sha1:a4740b148a04dc60e14fe6a1dfe216d3bae214fd</id>
<content type='text'>
Use memcpy_toio and memcpy_fromio variants of memcpy to guarantee no
unaligned access to IPC memory area. This is to allow the IPC memory to
be mapped as Device memory to further suppress speculative reads from
happening within the 64 kB memory area above the IPC memory when 64 kB
memory pages are used.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: bpmp: Fix Tegra234-only builds</title>
<updated>2021-06-11T11:31:51Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-04-13T12:23:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bd778b893963d67d7eb01f49d84ffcd3eaf229dd'/>
<id>urn:sha1:bd778b893963d67d7eb01f49d84ffcd3eaf229dd</id>
<content type='text'>
The tegra186_bpmp_ops symbol is used on Tegra234, so make sure it's
available.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: Enable BPMP support on Tegra234</title>
<updated>2020-09-18T13:57:04Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-09-17T10:07:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0ebdf11699d0491c0a1eee5bb5d920f4f36810ba'/>
<id>urn:sha1:0ebdf11699d0491c0a1eee5bb5d920f4f36810ba</id>
<content type='text'>
Enable support for the BPMP on Tegra234 to avoid relying on Tegra194
being enabled to pull in the needed OF device ID table entry.

On simulation platforms the BPMP hasn't booted up yet by the time we
probe the BPMP driver and the BPMP hasn't had a chance to mark the
doorbell as ringable by the CCPLEX. This corresponding check in the
BPMP driver will therefore fail. Work around this by disabling the
check on simulation platforms.

Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: Use consistent return variable name</title>
<updated>2020-07-14T15:57:18Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2020-07-12T10:01:15Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=edb2bca2ac48ad5fa2fcf7491fdf915a56dd24f6'/>
<id>urn:sha1:edb2bca2ac48ad5fa2fcf7491fdf915a56dd24f6</id>
<content type='text'>
Most functions in the BPMP driver use 'err' as the return variable
name but there are a few places that use 'ret'. Let's use 'err' to
be consistent.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
