kernel/drivers/dma/dw/pci.c, branch linux-rolling-stable

dmaengine: dw: Switch to LATE_SIMPLE_DEV_PM_OPS()

2025-02-10T10:59:11Z

SET_LATE_SYSTEM_SLEEP_PM_OPS is deprecated, replace it with LATE_SYSTEM_SLEEP_PM_OPS() and use pm_sleep_ptr() for setting the driver's pm routines. We can now remove the ifdeffery in the suspend and resume functions. Signed-off-by: Andy Shevchenko Acked-by: Viresh Kumar Reviewed-by: Serge Semin Link: https://lore.kernel.org/r/20250205150701.893083-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul

dmaengine: dw: Select only supported masters for ACPI devices

2024-12-02T17:05:45Z

The recently submitted fix-commit revealed a problem in the iDMA 32-bit platform code. Even though the controller supported only a single master the dw_dma_acpi_filter() method hard-coded two master interfaces with IDs 0 and 1. As a result the sanity check implemented in the commit b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") got incorrect interface data width and thus prevented the client drivers from configuring the DMA-channel with the EINVAL error returned. E.g., the next error was printed for the PXA2xx SPI controller driver trying to configure the requested channels: > [ 164.525604] pxa2xx_spi_pci 0000:00:07.1: DMA slave config failed > [ 164.536105] pxa2xx_spi_pci 0000:00:07.1: failed to get DMA TX descriptor > [ 164.543213] spidev spi-SPT0001:00: SPI transfer failed: -16 The problem would have been spotted much earlier if the iDMA 32-bit controller supported more than one master interfaces. But since it supports just a single master and the iDMA 32-bit specific code just ignores the master IDs in the CTLLO preparation method, the issue has been gone unnoticed so far. Fix the problem by specifying the default master ID for both memory and peripheral devices in the driver data. Thus the issue noticed for the iDMA 32-bit controllers will be eliminated and the ACPI-probed DW DMA controllers will be configured with the correct master ID by default. Cc: stable@vger.kernel.org Fixes: b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") Fixes: 199244d69458 ("dmaengine: dw: add support of iDMA 32-bit hardware") Reported-by: Ferry Toth Closes: https://lore.kernel.org/dmaengine/ZuXbCKUs1iOqFu51@black.fi.intel.com/ Reported-by: Andy Shevchenko Closes: https://lore.kernel.org/dmaengine/ZuXgI-VcHpMgbZ91@black.fi.intel.com/ Tested-by: Ferry Toth Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20241104095142.157925-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul

dmaengine: dw: switch from 'pci_' to 'dma_' API

2021-10-26T05:24:32Z

The wrappers in include/linux/pci-dma-compat.h should go away. pci_set_dma_mask()/pci_set_consistent_dma_mask() should be replaced with dma_set_mask()/dma_set_coherent_mask(), and use dma_set_mask_and_coherent() for both. Signed-off-by: Qing Wang Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/1633663733-47199-6-git-send-email-wangqing@vivo.com Signed-off-by: Vinod Koul

dmaengine: dw: Program xBAR hardware for Elkhart Lake

2021-07-14T04:46:30Z

Intel Elkhart Lake PSE DMA implementation is integrated with crossbar IP in order to serve more hardware than there are DMA request lines available. Due to this, program xBAR hardware to make flexible support of PSE peripheral. The Device-to-Device has not been tested and it's not supported by DMA Engine, but it's left in the code for the sake of documenting hardware features. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20210712113940.42753-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul

dmaengine: dw: Register ACPI DMA controller for PCI that has companion

2020-06-16T16:24:47Z

If PCI enumerated controller has a companion device, register it in the ACPI DMA controllers as well. Fixes: f7c799e950f9 ("dmaengine: dw: we do support Merrifield SoC in PCI mode") Depends-on: b685fe26e9af ("dmaengine: dw: platform: Split ACPI helpers to separate module") Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20200526182416.52805-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul

dmaengine: dw: Export struct dw_dma_chip_pdata for wider use

2019-08-21T04:11:27Z

We are expecting some devices can be enumerated either as PCI or ACPI. Nevertheless, they will share same information, thus, provide a generic struct dw_dma_chip_pdata for all glue drivers. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20190820131546.75744-4-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul

dmaengine: dw: Update Intel Elkhart Lake Service Engine acronym

2019-08-20T11:09:18Z

Intel Elkhart Lake Offload Service Engine (OSE) will be called as Intel(R) Programmable Services Engine (Intel(R) PSE) in documentation. Update the comment here accordingly. Signed-off-by: Jarkko Nikula Acked-by: Andy Shevchenko Acked-by: Viresh Kumar Link: https://lore.kernel.org/r/20190813080602.15376-1-jarkko.nikula@linux.intel.com Signed-off-by: Vinod Koul

dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake

2019-06-25T04:33:33Z

Intel Elkhart Lake OSE (Offload Service Engine) provides few DMA controllers to the host. Enable them in the driver. Signed-off-by: Andy Shevchenko Acked-by: Viresh Kumar Signed-off-by: Vinod Koul

dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit

2019-06-25T04:27:41Z

In the same way as done for ->probe(), call ->remove() based on the type of the hardware. While it works now due to equivalency of the two removal functions, it might be changed in the future. Signed-off-by: Andy Shevchenko Acked-by: Viresh Kumar Signed-off-by: Vinod Koul

dmaengine: dw: convert to SPDX identifiers

2019-01-07T12:27:13Z

This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Andy Shevchenko Signed-off-by: Vinod Koul