kernel/drivers/crypto/ccree/cc_hw_queue_defs.h, branch linux-rolling-stableHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable2020-03-12T12:00:16Zcrypto: ccree - update register handling macros2020-03-12T12:00:16ZHadar Gathadar.gat@arm.com2020-03-08T15:57:04Zurn:sha1:d8215ff1265fb711227f389fdf6c5b65c7120873
Changed CC_GENMASK macro so it can be used for all HW registers.
Signed-off-by: Hadar Gat <hadar.gat@arm.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - improve kerneldoc in cc_hw_queue_defs.h2020-02-22T01:25:45ZGeert Uytterhoevengeert+renesas@glider.be2020-02-11T18:19:18Zurn:sha1:67b74a4683893d40f8d2c143720f9954185f94e6
Miscellaneous improvements:
- Start comment blocks with "/**" to enable kerneldoc,
- Fix descriptor type of set_dout_mlli(),
- Fix copied config parameter of set_cipher_config1(),
- Fix copied config parameter of set_bytes_swap(),
- Add missing function names to kerneldoc headers,
- Add missing parameter descriptions,
- Remove descriptions for nonexistent parameters,
- Add missing colons,
- Remove references to obsolete camelcase parameter names,
- Sort according to actual parameter order,
- Fix grammar and spelling.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - use u32 for SRAM addresses2020-02-22T01:25:44ZGeert Uytterhoevengeert+renesas@glider.be2020-02-11T18:19:07Zurn:sha1:1a895f1d5bceee0c6b66dcfdabcc9804006ca229
SRAM addresses are small integer offsets into local SRAM. Currently
they are stored using a mixture of cc_sram_addr_t (u64), u32, and
dma_addr_t types.
Settle on u32, and remove the cc_sram_addr_t typedefs.
This allows to drop several casts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - use existing helpers to split 64-bit addresses2020-02-22T01:25:43ZGeert Uytterhoevengeert+renesas@glider.be2020-02-11T18:19:04Zurn:sha1:5fabab0d36d333c1d182369c845f6c7546a4afb8
Use the existing lower_32_bits() and upper_32_bits() macros instead of
explicit casts and shifts to split a 64-bit address in its two 32-bit
parts.
Drop the superfluous cast to "u16", as the FIELD_PREP() macro already
masks it to the specified field width.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - copyright header update2019-04-25T07:38:14ZGilad Ben-Yossefgilad@benyossef.com2019-04-18T13:38:53Zurn:sha1:03963caeb0dd77b1ead84a5ec913a7d28e8fe816
This sacrificial copyright header update is offered to the legal department
as atonement for any changes made in this driver files in the course of
the current year which have not been duly recorded as such.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - adapt CPP descriptor to new HW2019-04-25T07:38:13ZGilad Ben-Yossefgilad@benyossef.com2019-04-18T13:38:43Zurn:sha1:533edf9f93e84cabeae7c1acc8b3816c79f6f35a
Adapt the CPP descriptor to new HW interface.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - add remaining logic for CPP2019-04-25T07:38:13ZGilad Ben-Yossefgilad@benyossef.com2019-04-18T13:38:41Zurn:sha1:52f42c650a2be7136b03ca712ecde531d5de3c80
Add the missing logic to set usage policy protections for keys.
This enables key policy protection for AES.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - add SM3 support2018-11-09T09:37:58ZYael Chemlayael.chemla@foss.arm.com2018-10-18T12:59:59Zurn:sha1:927574e0e85da61f84dcda15d5b6a2baa06cda46
Add support for SM3 cipher in CryptoCell 713.
Signed-off-by: Yael Chemla <yael.chemla@foss.arm.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - modify set_cipher_mode usage from cc_hash2018-11-09T09:36:49ZYael Chemlayael.chemla@foss.arm.com2018-10-18T12:59:58Zurn:sha1:18a1dc1fd56b4a5b468ad5bf984a2b0ea5ee8c69
encapsulate set_cipher_mode call with another api,
preparation for specific hash behavior as needed in later patches
when SM3 introduced.
Signed-off-by: Yael Chemla <yael.chemla@foss.arm.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccree - add SM4 support2018-11-09T09:36:49ZGilad Ben-Yossefgilad@benyossef.com2018-10-29T09:50:14Zurn:sha1:9b8d51f812ce5c8bfffe440391fe85f6e5349f07
Add support for SM4 cipher in CryptoCell 713.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>