kernel/drivers/crypto/ccp/sp-pci.c, branch linux-6.18.y

crypto: ccp - Add an S4 restore flow

2026-02-26T22:59:26Z

[ Upstream commit 0ba2035026d0ab6c7c7e65ad8b418dc73d5700d9 ] The system will have lost power during S4. The ring used for TEE communications needs to be initialized before use. Fixes: f892a21f51162 ("crypto: ccp - use generic power management") Reported-by: Lars Francke Closes: https://lore.kernel.org/platform-driver-x86/CAD-Ua_gfJnQSo8ucS_7ZwzuhoBRJ14zXP7s8b-zX3ZcxcyWePw@mail.gmail.com/ Tested-by: Yijun Shen Signed-off-by: Mario Limonciello (AMD) Reviewed-by: Shyam Sundar S K Reviewed-by: Tom Lendacky Link: https://patch.msgid.link/20260116041132.153674-4-superm1@kernel.org Signed-off-by: Ilpo Järvinen Signed-off-by: Sasha Levin

crypto: ccp - Add support for PCI device 0x115A

2026-01-02T11:56:40Z

[ Upstream commit 9fc6290117259a8dbf8247cb54559df62fd1550f ] PCI device 0x115A is similar to pspv5, except it doesn't have platform access mailbox support. Signed-off-by: Mario Limonciello (AMD) Acked-by: Tom Lendacky Signed-off-by: Herbert Xu Signed-off-by: Sasha Levin

crypto: ccp - Add missing bootloader info reg for pspv6

2025-06-13T09:26:16Z

The bootloader info reg for pspv6 is the same as pspv4 and pspv5. Suggested-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu

crypto: ccp - Add missing tee info reg for teev2

2025-05-19T05:48:49Z

The tee info reg for teev2 is the same as teev1. Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu

crypto: ccp - Add missing bootloader info reg for pspv5

2025-05-19T05:48:49Z

The bootloader info reg for pspv5 is the same as pspv4. Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu

crypto: ccp - Add support for PCI device 0x17D8

2025-05-19T05:48:19Z

Add a new CCP/PSP PCI device ID. Signed-off-by: John Allen Signed-off-by: Herbert Xu

crypto: ccp - Add support for PCI device 0x1134

2025-02-22T07:56:02Z

PCI device 0x1134 shares same register features as PCI device 0x17E0. Hence reuse same data for the new PCI device ID 0x1134. Signed-off-by: Devaraj Rangasamy Acked-by: Tom Lendacky Reviewed-by: Mario Limonciello Signed-off-by: Herbert Xu

crypto: ccp - Fix check for the primary ASP device

2025-02-09T10:08:11Z

Currently, the ASP primary device check does not have support for PCI domains, and, as a result, when the system is configured with PCI domains (PCI segments) the wrong device can be selected as primary. This results in commands submitted to the device timing out and failing. The device check also relies on specific device and function assignments that may not hold in the future. Fix the primary ASP device check to include support for PCI domains and to perform proper checking of the Bus/Device/Function positions. Fixes: 2a6170dfe755 ("crypto: ccp: Add Platform Security Processor (PSP) device support") Cc: stable@vger.kernel.org Signed-off-by: Tom Lendacky Signed-off-by: Herbert Xu

crypto: ccp - Add support for getting security attributes on some older systems

2024-06-07T11:46:39Z

Older systems will not populate the security attributes in the capabilities register. The PSP on these systems, however, does have a command to get the security attributes. Use this command during ccp startup to populate the attributes if they're missing. Closes: https://github.com/fwupd/fwupd/issues/5284 Closes: https://github.com/fwupd/fwupd/issues/5675 Closes: https://github.com/fwupd/fwupd/issues/6253 Closes: https://github.com/fwupd/fwupd/issues/7280 Closes: https://github.com/fwupd/fwupd/issues/6323 Closes: https://github.com/fwupd/fwupd/discussions/5433 Signed-off-by: Mario Limonciello Acked-by: Tom Lendacky Signed-off-by: Herbert Xu

crypto: ccp - Move security attributes to their own file

2024-06-07T11:46:39Z

To prepare for other code that will manipulate security attributes move the handling code out of sp-pci.c. No intended functional changes. Signed-off-by: Mario Limonciello Acked-by: Tom Lendacky Signed-off-by: Herbert Xu