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<title>kernel/drivers/crypto/caam/caampkc.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2024-12-05T12:52:53Z</updated>
<entry>
<title>crypto: caam - add error check to caam_rsa_set_priv_key_form</title>
<updated>2024-12-05T12:52:53Z</updated>
<author>
<name>Chen Ridong</name>
<email>chenridong@huawei.com</email>
</author>
<published>2024-11-04T12:15:11Z</published>
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<id>urn:sha1:8a5f46d030f28e926a7a322aab64dceb38c1a17d</id>
<content type='text'>
[ Upstream commit b64140c74e954f1db6eae5548ca3a1f41b6fad79 ]

The caam_rsa_set_priv_key_form did not check for memory allocation errors.
Add the checks to the caam_rsa_set_priv_key_form functions.

Fixes: 52e26d77b8b3 ("crypto: caam - add support for RSA key form 2")
Signed-off-by: Chen Ridong &lt;chenridong@huawei.com&gt;
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Use new crypto_engine_op interface</title>
<updated>2023-08-18T09:01:10Z</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2023-08-13T06:55:01Z</published>
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<id>urn:sha1:623814c0408771399c4209db73f60685f7cf1d14</id>
<content type='text'>
Use the new crypto_engine_op interface where the callback is stored
in the algorithm object.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Include internal/engine.h</title>
<updated>2023-08-18T09:01:10Z</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2023-08-13T06:54:45Z</published>
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<id>urn:sha1:4ac1a2d88d8ff2b7d6decb40f712bf9ffddcd8c9</id>
<content type='text'>
Inlucde internal/engine.h because this driver uses directly
accesses attributes inside struct crypto_engine.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - fix unchecked return value error</title>
<updated>2023-08-18T09:01:08Z</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2023-08-08T10:55:25Z</published>
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<id>urn:sha1:e30685204711a6be40dec2622606950ccd37dafe</id>
<content type='text'>
error:
Unchecked return value (CHECKED_RETURN)
check_return: Calling sg_miter_next without checking return value

fix:
added check if(!sg_miter_next)

Fixes: 8a2a0dd35f2e ("crypto: caam - strip input zeros from RSA input buffer")
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Signed-off-by: Meenakshi Aggarwal &lt;meenakshi.aggarwal@nxp.com&gt;
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - reduce page 0 regs access to minimum</title>
<updated>2023-04-14T10:59:34Z</updated>
<author>
<name>Horia GeantA</name>
<email>horia.geanta@nxp.com</email>
</author>
<published>2023-04-05T09:07:51Z</published>
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<id>urn:sha1:ae1dd17daeb8193b1ea3665c89ade63cf7385182</id>
<content type='text'>
Use job ring register map, in place of controller register map
to access page 0 registers, as access to the controller register
map is not permitted.

Signed-off-by: Horia GeantA &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Signed-off-by: Meenakshi Aggarwal &lt;meenakshi.aggarwal@nxp.com&gt;
Reviewed-by: Varun Sethi &lt;v.sethi@nxp.com&gt;
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Remove GFP_DMA and add DMA alignment padding</title>
<updated>2023-01-06T09:15:47Z</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2022-12-30T05:21:38Z</published>
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<id>urn:sha1:199354d7fb6eaa2cc5bb650af0bca624baffee35</id>
<content type='text'>
GFP_DMA does not guarantee that the returned memory is aligned
for DMA.  It should be removed where it is superfluous.

However, kmalloc may start returning DMA-unaligned memory in future
so fix this by adding the alignment by hand.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Set DMA alignment explicitly</title>
<updated>2022-12-02T10:12:41Z</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2022-11-25T04:36:45Z</published>
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<id>urn:sha1:4cb4f7c11deef5222ac15631b16ab54625b926b3</id>
<content type='text'>
This driver has been implicitly relying on kmalloc alignment
to be sufficient for DMA.  This may no longer be the case with
upcoming arm64 changes.

This patch changes it to explicitly request DMA alignment from
the Crypto API.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Use helper to set reqsize</title>
<updated>2022-12-02T10:12:39Z</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2022-11-22T09:40:51Z</published>
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<id>urn:sha1:908d383b6c94be0f89c5e2a5a346d99495efd4d4</id>
<content type='text'>
The value of reqsize must only be changed through the helper.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - save caam memory to support crypto engine retry mechanism.</title>
<updated>2021-12-03T04:56:17Z</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2021-11-22T11:32:34Z</published>
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<id>urn:sha1:087e1d715bccf25dc0e83294576e416b0386ba20</id>
<content type='text'>
When caam queue is full (-ENOSPC), caam frees descriptor memory.
crypto-engine checks if retry support is true and h/w queue
is full(-ENOSPC), then requeue the crypto request.
During processing the requested descriptor again, caam gives below error.
(caam_jr 30902000.jr: 40000006: DECO: desc idx 0: Invalid KEY Command).

This patch adds a check to return when caam input ring is full
and retry support is true. so descriptor memory is not freed
and requeued request can be processed again.

Fixes: 2d653936eb2cf ("crypto: caam - enable crypto-engine retry mechanism")
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - disable pkc for non-E SoCs</title>
<updated>2021-09-24T08:03:04Z</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2021-09-15T22:03:07Z</published>
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<id>urn:sha1:f20311cc9c58052e0b215013046cbf390937910c</id>
<content type='text'>
On newer CAAM versions, not all accelerators are disabled if the SoC is
a non-E variant. While the driver checks most of the modules for
availability, there is one - PKHA - which sticks out. On non-E variants
it is still reported as available, that is the number of instances is
non-zero, but it has limited functionality. In particular it doesn't
support encryption and decryption, but just signing and verifying. This
is indicated by a bit in the PKHA_MISC field. Take this bit into account
if we are checking for availability.

This will the following error:
[    8.167817] caam_jr 8020000.jr: 20000b0f: CCB: desc idx 11: : Invalid CHA selected.

Tested on an NXP LS1028A (non-E) SoC.

Fixes: d239b10d4ceb ("crypto: caam - add register map changes cf. Era 10")
Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
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