<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/crypto/caam/caamalg_desc.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2025-10-20T04:10:28Z</updated>
<entry>
<title>crypto: caam - Add support of paes algorithm</title>
<updated>2025-10-20T04:10:28Z</updated>
<author>
<name>Meenakshi Aggarwal</name>
<email>meenakshi.aggarwal@nxp.com</email>
</author>
<published>2025-10-06T07:17:53Z</published>
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<id>urn:sha1:66b9a095f7f9e1031e5333661be513e89e40ee08</id>
<content type='text'>
PAES algorithm uses protected key for encryption/decryption operations.

Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Signed-off-by: Meenakshi Aggarwal &lt;meenakshi.aggarwal@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam/jr - add support for XTS with 16B IV</title>
<updated>2020-10-02T08:02:12Z</updated>
<author>
<name>Andrei Botila</name>
<email>andrei.botila@nxp.com</email>
</author>
<published>2020-09-22T16:03:26Z</published>
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<id>urn:sha1:78eebbfafbe721c9d9feadd4bcde958ff9c784a6</id>
<content type='text'>
Newer CAAM versions (Era 9+) support 16B IVs. Since for these devices
the HW limitation is no longer present newer version should process the
requests containing 16B IVs directly in hardware without using a fallback.

Signed-off-by: Andrei Botila &lt;andrei.botila@nxp.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Fix kerneldoc</title>
<updated>2020-09-18T07:20:12Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2020-09-10T19:29:16Z</published>
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<id>urn:sha1:319936bf8f83c0ceda837188802557437f71baa6</id>
<content type='text'>
Fix kerneldoc warnings like:

  drivers/crypto/caam/caamalg_qi2.c:73: warning: cannot understand function prototype: 'struct caam_ctx'
  drivers/crypto/caam/caamalg_qi2.c:2962: warning: cannot understand function prototype: 'struct caam_hash_ctx'
  drivers/crypto/caam/ctrl.c:449: warning: Function parameter or member 'ctrl' not described in 'caam_get_era'

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Reviewed-by: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - update xts sector size for large input length</title>
<updated>2020-03-06T01:28:25Z</updated>
<author>
<name>Andrei Botila</name>
<email>andrei.botila@nxp.com</email>
</author>
<published>2020-02-28T10:46:48Z</published>
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<id>urn:sha1:3f142b6a7b573bde6cff926f246da05652c61eb4</id>
<content type='text'>
Since in the software implementation of XTS-AES there is
no notion of sector every input length is processed the same way.
CAAM implementation has the notion of sector which causes different
results between the software implementation and the one in CAAM
for input lengths bigger than 512 bytes.
Increase sector size to maximum value on 16 bits.

Fixes: c6415a6016bf ("crypto: caam - add support for acipher xts(aes)")
Cc: &lt;stable@vger.kernel.org&gt; # v4.12+
Signed-off-by: Andrei Botila &lt;andrei.botila@nxp.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam/qi2 - fix chacha20 data size error</title>
<updated>2020-03-06T01:28:25Z</updated>
<author>
<name>Horia Geantă</name>
<email>horia.geanta@nxp.com</email>
</author>
<published>2020-02-28T06:51:23Z</published>
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<id>urn:sha1:3a5a9e1ef37b030b836d92df8264f840988f4a38</id>
<content type='text'>
HW generates a Data Size error for chacha20 requests that are not
a multiple of 64B, since algorithm state (AS) does not have
the FINAL bit set.

Since updating req-&gt;iv (for chaining) is not required,
modify skcipher descriptors to set the FINAL bit for chacha20.

[Note that for skcipher decryption we know that ctx1_iv_off is 0,
which allows for an optimization by not checking algorithm type,
since append_dec_op1() sets FINAL bit for all algorithms except AES.]

Also drop the descriptor operations that save the IV.
However, in order to keep code logic simple, things like
S/G tables generation etc. are not touched.

Cc: &lt;stable@vger.kernel.org&gt; # v5.3+
Fixes: 334d37c9e263 ("crypto: caam - update IV using HW support")
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Tested-by: Valentin Ciocoi Radulescu &lt;valentin.ciocoi@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - update rfc4106 sh desc to support zero length input</title>
<updated>2019-08-09T05:11:48Z</updated>
<author>
<name>Iuliana Prodan</name>
<email>iuliana.prodan@nxp.com</email>
</author>
<published>2019-07-31T13:08:09Z</published>
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<id>urn:sha1:d28a43edf3caff971b58d75c83ad00487152e448</id>
<content type='text'>
Update share descriptor for rfc4106 to skip instructions in case
cryptlen is zero. If no instructions are jumped the DECO hangs and a
timeout error is thrown.

Signed-off-by: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Reviewed-by: Horia Geanta &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - fix concurrency issue in givencrypt descriptor</title>
<updated>2019-08-09T05:05:34Z</updated>
<author>
<name>Horia Geantă</name>
<email>horia.geanta@nxp.com</email>
</author>
<published>2019-07-30T05:48:33Z</published>
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<id>urn:sha1:48f89d2a2920166c35b1c0b69917dbb0390ebec7</id>
<content type='text'>
IV transfer from ofifo to class2 (set up at [29][30]) is not guaranteed
to be scheduled before the data transfer from ofifo to external memory
(set up at [38]:

[29] 10FA0004           ld: ind-nfifo (len=4) imm
[30] 81F00010               &lt;nfifo_entry: ofifo-&gt;class2 type=msg len=16&gt;
[31] 14820004           ld: ccb2-datasz len=4 offs=0 imm
[32] 00000010               data:0x00000010
[33] 8210010D    operation: cls1-op aes cbc init-final enc
[34] A8080B04         math: (seqin + math0)-&gt;vseqout len=4
[35] 28000010    seqfifold: skip len=16
[36] A8080A04         math: (seqin + math0)-&gt;vseqin len=4
[37] 2F1E0000    seqfifold: both msg1-&gt;2-last2-last1 len=vseqinsz
[38] 69300000   seqfifostr: msg len=vseqoutsz
[39] 5C20000C      seqstr: ccb2 ctx len=12 offs=0

If ofifo -&gt; external memory transfer happens first, DECO will hang
(issuing a Watchdog Timeout error, if WDOG is enabled) waiting for
data availability in ofifo for the ofifo -&gt; c2 ififo transfer.

Make sure IV transfer happens first by waiting for all CAAM internal
transfers to end before starting payload transfer.

New descriptor with jump command inserted at [37]:

[..]
[36] A8080A04         math: (seqin + math0)-&gt;vseqin len=4
[37] A1000401         jump: jsl1 all-match[!nfifopend] offset=[01] local-&gt;[38]
[38] 2F1E0000    seqfifold: both msg1-&gt;2-last2-last1 len=vseqinsz
[39] 69300000   seqfifostr: msg len=vseqoutsz
[40] 5C20000C      seqstr: ccb2 ctx len=12 offs=0

[Note: the issue is present in the descriptor from the very beginning
(cf. Fixes tag). However I've marked it v4.19+ since it's the oldest
maintained kernel that the patch applies clean against.]

Cc: &lt;stable@vger.kernel.org&gt; # v4.19+
Fixes: 1acebad3d8db8 ("crypto: caam - faster aead implementation")
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - update IV using HW support</title>
<updated>2019-06-20T06:18:33Z</updated>
<author>
<name>Horia Geantă</name>
<email>horia.geanta@nxp.com</email>
</author>
<published>2019-06-10T13:30:59Z</published>
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<id>urn:sha1:334d37c9e26364511f0673ef155e2ad207316e90</id>
<content type='text'>
Modify drivers to perform skcipher IV update using the crypto engine,
instead of performing the operation in SW.

Besides being more efficient, this also fixes IV update for CTR mode.

Output HW S/G table is appended with an entry pointing to the same
IV buffer used as input (which is now mapped BIDIRECTIONAL).

AS (Algorithm State) parameter of the OPERATION command is changed
from INIFINAL to INIT in descriptors used by ctr(aes), cbc(aes).
This is needed since in case FINAL bit is set, HW skips IV updating
in the Context Register for the last data block.

Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - print debug messages at debug level</title>
<updated>2019-05-30T07:35:45Z</updated>
<author>
<name>Sascha Hauer</name>
<email>s.hauer@pengutronix.de</email>
</author>
<published>2019-05-23T08:50:29Z</published>
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<id>urn:sha1:6e005503199b9bf1b385949c05897fd6567b5af4</id>
<content type='text'>
The CAAM driver used to put its debug messages inside #ifdef DEBUG and
then prints the messages at KERN_ERR level. Replace this with proper
functions printing at KERN_DEBUG level. The #ifdef DEBUG gets
unnecessary when the right functions are used.

This replaces:

- print_hex_dump(KERN_ERR ...) inside #ifdef DEBUG with
  print_hex_dump_debug(...)
- dev_err() inside #ifdef DEBUG with dev_dbg()
- printk(KERN_ERR ...) inside #ifdef DEBUG with dev_dbg()

Some parts of the driver use these functions already, so it is only
consequent to use the debug function consistently.

Signed-off-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - add ecb(*) support</title>
<updated>2019-02-15T05:21:55Z</updated>
<author>
<name>Iuliana Prodan</name>
<email>iuliana.prodan@nxp.com</email>
</author>
<published>2019-02-08T13:50:09Z</published>
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<id>urn:sha1:eaed71a44ad9369a2b2205cedcb9d5d894c733fa</id>
<content type='text'>
Add ecb mode support for aes, des, 3des and arc4 ciphers.
ecb(*) reuses existing skcipher implementation, updating it with support
for no IV.

Signed-off-by: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
