<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/clk/ti/clock.h, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2024-02-26T11:08:45Z</updated>
<entry>
<title>clk: ti: Improve clksel clock bit parsing for reg property</title>
<updated>2024-02-26T11:08:45Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2024-02-13T10:48:52Z</published>
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<id>urn:sha1:4a5917cd504c7afd5e9de7166eb710687a9b026f</id>
<content type='text'>
Because of legacy reasons, the TI clksel composite clocks can have
overlapping reg properties, and use a custom ti,bit-shift property.

For the clksel clocks we can start using of the standard reg property
instead of the custom ti,bit-shift property.

To do this, let's add a ti_clk_get_legacy_bit_shift() helper, and make
ti_clk_get_reg_addr() populate the clock bit offset.

This makes it possible to update the devicetree files to use the reg
property one clock at a time.

Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>clk: ti: change ti_clk_register[_omap_hw]() API</title>
<updated>2022-11-23T01:01:47Z</updated>
<author>
<name>Dario Binacchi</name>
<email>dario.binacchi@amarulasolutions.com</email>
</author>
<published>2022-11-13T18:11:46Z</published>
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<id>urn:sha1:3400d546a741a2b2001d88e7fa29110d45a3930d</id>
<content type='text'>
The ti_clk_register() and ti_clk_register_omap_hw() functions are always
called with the parameter of type "struct device" set to NULL, since the
functions from which they are called always have a parameter of type
"struct device_node". Replacing "struct device" type parameter with
"struct device_node" will allow you to register a TI clock to the common
clock framework by taking advantage of the facilities provided by the
"struct device_node" type. Further, adding the "of_" prefix to the name
of these functions explicitly binds them to the "struct device_node"
type.

The patch has been tested on a Beaglebone board.

Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
Tested-by: Tony Lindgren &lt;tony@atomide.com&gt;
Reviewed-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20221113181147.1626585-1-dario.binacchi@amarulasolutions.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 1)</title>
<updated>2022-06-10T12:51:35Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2022-06-07T14:11:11Z</published>
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<id>urn:sha1:52e6676ef56f4803b1ef14ed427c5824050163a3</id>
<content type='text'>
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>clk: ti: Drop legacy compatibility clocks for am4</title>
<updated>2022-03-15T21:07:27Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2022-02-03T08:56:17Z</published>
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<id>urn:sha1:e65eb2efc6175392f0e97f515e6e5b179e181cd8</id>
<content type='text'>
We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20220203085618.16043-3-tony@atomide.com
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: ti: Add ti_dt_clk_name() helper to use clock-output-names</title>
<updated>2022-03-11T02:55:59Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2022-02-04T07:14:47Z</published>
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<id>urn:sha1:2c1593328d7f02fe49de5ad6b42c36296c9d6922</id>
<content type='text'>
Let's create the clock alias based on the clock-output-names property if
available. Also the component clock drivers can use ti_dt_clk_name() in
the following patches.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20220204071449.16762-7-tony@atomide.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: let init callback return an error code</title>
<updated>2019-12-24T02:53:13Z</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2019-09-24T12:39:53Z</published>
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<id>urn:sha1:89d079dc17e8a32397de827cc85c1f4911b90424</id>
<content type='text'>
If the init callback is allowed to request resources, it needs a return
value to report the outcome of such a request.

Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Link: https://lkml.kernel.org/r/20190924123954.31561-3-jbrunet@baylibre.com
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: ti: divider: convert to use min,max,mask instead of width</title>
<updated>2019-10-31T13:32:36Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2019-10-02T12:06:10Z</published>
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<id>urn:sha1:8ffea6eef4ace7e207fc2fe852d2019d93f51d1a</id>
<content type='text'>
The existing width field used to check divider validity does not provide
enough protection against bad values. For example, if max divider value
is 4, the smallest all-1 bitmask that can hold this value is 7, which
allows values higher than 4 to be used. This typically causes
unpredictable results with hardware. So far this issue hasn't been
noticed as most of the dividers actually have maximum values which fit
the whole bitfield, but there are certain clocks for which this is a
problem, like dpll4_m4 divider on omap3 devices.

Thus, convert the whole validity logic to use min,max and mask values
for determining if a specific divider is valid or not. This prevents
the odd cases where bad value would otherwise be written to a divider
config register.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Tested-by: Adam Ford &lt;aford173@gmail.com&gt;
</content>
</entry>
<entry>
<title>clk: ti: divider: cleanup ti_clk_parse_divider_data API</title>
<updated>2019-10-31T13:32:34Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2019-10-02T12:06:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a229965cfeab8ea8bb79086d6f59ac9a57de66fe'/>
<id>urn:sha1:a229965cfeab8ea8bb79086d6f59ac9a57de66fe</id>
<content type='text'>
Cleanup the ti_clk_parse_divider_data to pass the divider data struct
directly instead of individual values of it. This makes it easier
to modify the implementation later on.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Tested-by: Adam Ford &lt;aford173@gmail.com&gt;
</content>
</entry>
<entry>
<title>clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices</title>
<updated>2019-04-25T17:51:36Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2019-04-04T08:11:05Z</published>
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<id>urn:sha1:869decd1ff197c3083cb8b58f7dcac201038c381</id>
<content type='text'>
RNG and TIMER12 are reserved for secure side usage only on HS devices,
so disable their clkctrl clocks on HS SoCs also.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Tested-by: Andrew F. Davis &lt;afd@ti.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: ti: dra7x: prevent non-existing clkctrl clocks from registering</title>
<updated>2019-04-25T17:51:33Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2019-04-04T08:11:04Z</published>
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<id>urn:sha1:2b1202d708fd3117bca6bad8770353f389ee0f08</id>
<content type='text'>
Certain clkctrl clocks (like the USB_OTG_SS4) do not exist on some
variants of the dra7x SoC. Append a flag for these clocks and skip
the registration in cases where the clocks do not exist.

Reported-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
