kernel/drivers/clk/tegra/clk.c, branch linux-6.9.y

Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next

2023-08-30T21:38:19Z

- Add Versa3 clk generator to support 48KHz playback/record with audio codec on RZ/G2L SMARC EVK - Introduce kstrdup_and_replace() and use it * clk-versa: clk: vc7: Use i2c_get_match_data() instead of device_get_match_data() clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() clk: versaclock3: Switch to use i2c_driver's probe callback clk: Add support for versa3 clock driver dt-bindings: clock: Add Renesas versa3 clock generator bindings * clk-strdup: clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace() clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace() driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace() lib/string_helpers: Add kstrdup_and_replace() helper * clk-amlogic: (22 commits) dt-bindings: soc: amlogic: document System Control registers dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema clk: meson: axg-audio: move bindings include to main driver clk: meson: meson8b: move bindings include to main driver clk: meson: a1: move bindings include to main driver clk: meson: eeclk: move bindings include to main driver clk: meson: aoclk: move bindings include to main driver dt-bindings: clk: axg-audio-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids dt-bindings: clk: meson8b-clkc: expose all clock ids dt-bindings: clk: g12a-aoclkc: expose all clock ids dt-bindings: clk: g12a-clks: expose all clock ids dt-bindings: clk: axg-clkc: expose all clock ids dt-bindings: clk: gxbb-clkc: expose all clock ids clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS ... * clk-allwinner: clk: sunxi-ng: nkm: Prefer current parent rate clk: sunxi-ng: a64: select closest rate for pll-video0 clk: sunxi-ng: div: Support finding closest rate clk: sunxi-ng: mux: Support finding closest rate clk: sunxi-ng: nkm: Support finding closest rate clk: sunxi-ng: nm: Support finding closest rate clk: sunxi-ng: Add helper function to find closest rate clk: sunxi-ng: Add feature to find closest rate clk: sunxi-ng: a64: allow pll-mipi to set parent's rate clk: sunxi-ng: nkm: consider alternative parent rates when determining rate clk: sunxi-ng: nkm: Use correct parameter name for parent HW clk: sunxi-ng: Modify mismatched function name clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource() * clk-rockchip: clk: rockchip: rv1126: Add PD_VO clock tree clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz clk: rockchip: rk3568: Add PLL rate for 101MHz

clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace()

2023-08-05T01:21:50Z

Replace open coded functionality of kstrdup_and_replace() with a call. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230804143910.15504-4-andriy.shevchenko@linux.intel.com Signed-off-by: Stephen Boyd

clk: Explicitly include correct DT includes

2023-07-19T20:13:16Z

The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Dinh Nguyen Acked-by: Krzysztof Kozlowski # samsung Acked-by: Heiko Stuebner #rockchip Acked-by: Chanwoo Choi Acked-by: Geert Uytterhoeven Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Luca Ceresoli # versaclock5 Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org Acked-by: Abel Vesa #imx Signed-off-by: Stephen Boyd

clk: tegra: Support runtime PM and power domain

2021-12-15T17:55:21Z

The Clock-and-Reset controller resides in a core power domain on NVIDIA Tegra SoCs. In order to support voltage scaling of the core power domain, we hook up DVFS-capable clocks to the core GENPD for managing of the GENPD's performance state based on the clock changes. Some clocks don't have any specific physical hardware unit that backs them, like root PLLs and system clock and they have theirs own voltage requirements. This patch adds new clk-device driver that backs the clocks and provides runtime PM functionality for them. A virtual clk-device is created for each such DVFS-capable clock at the clock's registration time by the new tegra_clk_register() helper. Driver changes clock's device GENPD performance state based on clk-rate notifications. In result we have this sequence of events: 1. Clock driver creates virtual device for selective clocks, enables runtime PM for the created device and registers the clock. 2. Clk-device driver starts to listen to clock rate changes. 3. Something changes clk rate or enables/disables clk. 4. CCF core propagates the change through the clk tree. 5. Clk-device driver gets clock rate-change notification or GENPD core handles prepare/unprepare of the clock. 6. Clk-device driver changes GENPD performance state on clock rate change. 7. GENPD driver changes voltage regulator state change. 8. The regulator state is committed to hardware via I2C. We rely on fact that DVFS is not needed for Tegra I2C and that Tegra I2C driver already keeps clock always-prepared. Hence I2C subsystem stays independent from the clk power management and there are no deadlock spots in the sequence. Currently all clocks are registered very early during kernel boot when the device driver core isn't available yet. The clk-device can't be created at that time. This patch splits the registration of the clocks in two phases: 1. Register all essential clocks which don't use RPM and are needed during early boot. 2. Register at a later boot time the rest of clocks. This patch adds power management support for Tegra20 and Tegra30 clocks. Reviewed-by: Ulf Hansson Tested-by: Peter Geis # Ouya T30 Tested-by: Paul Fertser # PAZ00 T20 Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar # Ouya T30 Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

clk: tegra: Fix double-free in tegra_clk_init()

2019-12-24T08:01:06Z

It's unlikely to happen in practice ever, but makes static checkers happy. Fixes: 535f296d47de ("clk: tegra: Add suspend and resume support on Tegra210") Reported-by: Stephen Boyd Signed-off-by: Dmitry Osipenko Link: https://lkml.kernel.org/r/20191210020512.6088-1-digetx@gmail.com Acked-by: Thierry Reding Signed-off-by: Stephen Boyd

clk: tegra: Add suspend and resume support on Tegra210

2019-11-11T13:53:04Z

All the CAR controller settings are lost on suspend when core power goes off. This implement saving and restoring context for all PLLs and clocks during system suspend and resume to have the clocks back to same state for normal operation. Clock driver suspend and resume are registered as syscore_ops as clocks restore need to happen before the other drivers resume to have all their clocks back to the same state as before suspend. Signed-off-by: Sowjanya Komatineni Reviewed-by: Dmitry Osipenko Signed-off-by: Thierry Reding

clk: tegra: Share clk and rst register defines with Tegra clock driver

2019-11-11T13:53:04Z

Move CLK_OUT_ENB and RST_DEVICES registers to clk.h to share these with Tegra clock driver. Signed-off-by: Sowjanya Komatineni Signed-off-by: Thierry Reding

clk: tegra: clk-super: Fix to enable PLLP branches to CPU

2019-11-11T13:53:03Z

This patch has a fix to enable PLLP branches to CPU before changing the CPU cluster clock source to PLLP for Gen5 Super clock and disables PLLP branches to CPU when not in use. During system suspend entry and exit, CPU source will be switched to PLLP and this needs PLLP branches to be enabled to CPU prior to the switch. On system resume, warmboot code enables PLLP branches to CPU and powers up the CPU with PLLP clock source. Acked-by: Thierry Reding Reviewed-by: Dmitry Osipenko Signed-off-by: Sowjanya Komatineni Signed-off-by: Thierry Reding

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201

2019-05-30T18:29:52Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Steve Winslow Reviewed-by: Richard Fontana Reviewed-by: Alexios Zavras Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman

clk: Remove io.h from clk-provider.h

2019-05-15T20:21:37Z

Now that we've gotten rid of clk_readl() we can remove io.h from the clk-provider header and push out the io.h include to any code that isn't already including the io.h header but using things like readl/writel, etc. Found with this grep: git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \ xargs git grep -l \ -e '\<__iowrite32_copy\>' --or \ -e '\<__ioread32_copy\>' --or \ -e '\<__iowrite64_copy\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__devm_memremap_pages\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__io_aw\>' --or \ -e '\<__io_pbw\>' --or \ -e '\<__io_paw\>' --or \ -e '\<__io_pbr\>' --or \ -e '\<__io_par\>' --or \ -e '\<__raw_readb\>' --or \ -e '\<__raw_readw\>' --or \ -e '\<__raw_readl\>' --or \ -e '\<__raw_readq\>' --or \ -e '\<__raw_writeb\>' --or \ -e '\<__raw_writew\>' --or \ -e '\<__raw_writel\>' --or \ -e '\<__raw_writeq\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__io_virt\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__ioremap\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' I also reordered a couple includes when they weren't alphabetical and removed clk.h from kona, replacing it with clk-provider.h because that driver doesn't use clk consumer APIs. Acked-by: Geert Uytterhoeven Cc: Chen-Yu Tsai Acked-by: Maxime Ripard Acked-by: Tero Kristo Acked-by: Sekhar Nori Cc: Krzysztof Kozlowski Acked-by: Mark Brown Cc: Chris Zankel Acked-by: Max Filippov Acked-by: John Crispin Acked-by: Heiko Stuebner Signed-off-by: Stephen Boyd