kernel/drivers/clk/qcom/reset.c, branch linux-5.1.yHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y2016-03-29T23:30:26Zclk: qcom: Make reset_control_ops const2016-03-29T23:30:26ZPhilipp Zabelp.zabel@pengutronix.de2016-02-25T09:45:12Zurn:sha1:add479eeb1a208a31ab913ae7c97506a81383079
The qcom_reset_ops structure is never modified. Make it const.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: qcom: Add reset controller support2014-01-16T20:01:02ZStephen Boydsboyd@codeaurora.org2014-01-15T18:47:27Zurn:sha1:b36ba30c8ac66249915c57be101180cc58c42085
Reset controllers and clock controllers are combined into one IP
block on Qualcomm chipsets. Usually a reset signal is associated
with each clock branch but sometimes a reset signal is associated
with a handful of clocks. Either way the register interface is
the same; set a bit to assert a reset and clear a bit to deassert
a reset. Add support for these types of resets signals.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>