kernel/drivers/clk/qcom/common.h, branch linux-6.9.y

clk: qcom: regmap-mux: fix parent clock lookup

2021-12-02T23:07:34Z

The function mux_get_parent() uses qcom_find_src_index() to find the parent clock index, which is incorrect: qcom_find_src_index() uses src enum for the lookup, while mux_get_parent() should use cfg field (which corresponds to the register value). Add qcom_find_cfg_index() function doing this kind of lookup and use it for mux parent lookup. Fixes: df964016490b ("clk: qcom: add parent map for regmap mux") Cc: stable@vger.kernel.org Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20211115233407.1046179-1-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd

clk: qcom: define probe by index API as common API

2019-08-08T15:20:01Z

Extend the probe by index API in common code to be used by other qcom clock controller. Signed-off-by: Govind Singh Signed-off-by: Stephen Boyd

clk: qcom: Make common clk_hw registrations

2019-02-22T08:06:57Z

Several clock controller drivers define a list of clk_hw devices, and then register those devices in probe() before using common code to process the rest of initialization. Extend the common code to accept a list of clk_hw devices to process, thus eliminating many duplicate implementations. Signed-off-by: Jeffrey Hugo Suggested-by: Stephen Boyd Reviewed-by: Vinod Koul Tested-by: Vinod Koul Signed-off-by: Stephen Boyd

clk: qcom: Update SPDX headers for common files

2018-07-25T16:23:33Z

SPDX headers updated for common/branch/pll/regmap files. Signed-off-by: Taniya Das Signed-off-by: Stephen Boyd

clk: qcom: add parent map for regmap mux

2017-12-22T00:03:22Z

Currently the driver assumes the register configuration value is identical to its index in the parent map. This patch adds the parent map field in regmap mux clock node which contains the mapping of parent index with actual register configuration value. If regmap node contains this parent map then the configuration value will be taken from this parent map instead of simply writing the index value. Signed-off-by: Abhishek Sahu Signed-off-by: Stephen Boyd

clk: qcom: Add rcg ops to return floor value closest to the requested rate

2016-11-23T19:00:05Z

The default behaviour with clk_rcg2_ops is for the clk_round_rate()/clk_set_rate() to return/set a ceil clock rate closest to the requested rate by looking up the corresponding frequency table. However, we do have some instances (mainly sdcc on various platforms) of clients expecting a clk_set_rate() to set a floor value instead. Add a new clk_rcg2_floor_ops to handle this for such specific rcg instances Signed-off-by: Rajendra Nayak Signed-off-by: Ritesh Harjani Signed-off-by: Stephen Boyd

clk: qcom: Enable FSM mode for votable alpha PLLs

2016-11-02T01:39:17Z

The votable alpha PLLs need to have the fsm mode enabled as part of the initialization. The sequence seems to be the same as used by clk-pll, so move the function which does this into a common place and reuse it for the clk-alpha-pll Signed-off-by: Rajendra Nayak Signed-off-by: Taniya Das Signed-off-by: Stephen Boyd

clk: qcom: common: Add API to register board clocks backwards compatibly

2015-11-16T19:07:06Z

We want to put the XO board clocks into the dt files, but we also need to be backwards compatible with an older dtb. Add an API to the common code to do this. This also makes a place for us to handle the case when the RPM clock driver is enabled and we don't want to register the fixed factor clock. Cc: Georgi Djakov Signed-off-by: Stephen Boyd

clk: qcom: Drop calls to qcom_cc_remove()

2015-10-09T06:53:01Z

Now that qcom_cc_remove() is a nop, drop calls to qcom_cc_remove() and any empty driver remove functions. Cc: Rajendra Nayak Signed-off-by: Stephen Boyd

clk: qcom: gdsc: Prepare common clk probe to register gdscs

2015-09-16T22:22:37Z

The common clk probe registers a clk provider and a reset controller. Update it to register a genpd provider using the gdsc data provided by each platform. Signed-off-by: Rajendra Nayak Signed-off-by: Stephen Boyd