<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/clk/mediatek/clk-gate.h, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2023-01-31T00:44:56Z</updated>
<entry>
<title>clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()</title>
<updated>2023-01-31T00:44:56Z</updated>
<author>
<name>AngeloGioacchino Del Regno</name>
<email>angelogioacchino.delregno@collabora.com</email>
</author>
<published>2023-01-20T09:20:33Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=20498d52c9c1a68b1d92c42bce1dc893d3e74f30'/>
<id>urn:sha1:20498d52c9c1a68b1d92c42bce1dc893d3e74f30</id>
<content type='text'>
Commit e4c23e19aa2a ("clk: mediatek: Register clock gate with device")
introduces a helper function for the sole purpose of propagating a
struct device pointer to the clk API when registering the mtk-gate
clocks to take advantage of Runtime PM when/where needed and where
a power domain is defined in devicetree.

Function mtk_clk_register_gates() then becomes a wrapper around the
new mtk_clk_register_gates_with_dev() function that will simply pass
NULL as struct device: this is essential when registering drivers
with CLK_OF_DECLARE instead of as a platform device, as there will
be no struct device to pass... but we can as well simply have only
one function that always takes such pointer as a param and pass NULL
when unavoidable.

This commit removes the mtk_clk_register_gates() wrapper and renames
mtk_clk_register_gates_with_dev() to the former and all of the calls
to either of the two functions were fixed in all drivers in order to
reflect this change; also, to improve consistency with other kernel
functions, the pointer to struct device was moved as the first param.

Since a lot of MediaTek clock drivers are actually registering as a
platform device, but were still registering the mtk-gate clocks
without passing any struct device to the clock framework, they've
been changed to pass a valid one now, as to make all those platforms
able to use runtime power management where available.

While at it, some much needed indentation changes were also done.

Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: Markus Schneider-Pargmann &lt;msp@baylibre.com&gt;
Tested-by: Miles Chen &lt;miles.chen@mediatek.com&gt;
Link: https://lore.kernel.org/r/20230120092053.182923-4-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su &lt;mingming.su@mediatek.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: Replace 'struct clk' with 'struct clk_hw'</title>
<updated>2022-05-19T23:57:56Z</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wenst@chromium.org</email>
</author>
<published>2022-05-19T07:16:08Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=609cc5e1a82394e0b704fd41439fa751f8a9edf2'/>
<id>urn:sha1:609cc5e1a82394e0b704fd41439fa751f8a9edf2</id>
<content type='text'>
As part of the effort to improve the MediaTek clk drivers, the next step
is to switch from the old 'struct clk' clk prodivder APIs to the new
'struct clk_hw' ones.

Instead of adding new APIs to the MediaTek clk driver library mirroring
the existing ones, moving all drivers to the new APIs, and then removing
the old ones, just migrate everything at the same time. This involves
replacing 'struct clk' with 'struct clk_hw', and 'struct clk_onecell_data'
with 'struct clk_hw_onecell_data', and fixing up all usages.

For now, the clk_register() and co. usage is retained, with __clk_get_hw()
and (struct clk_hw *)-&gt;clk used to bridge the difference between the APIs.
These will be replaced in subsequent patches.

Fix up mtk_{alloc,free}_clk_data to use 'struct clk_hw' by hand. Fix up
all other affected call sites with the following coccinelle script.

    // Replace type
    @@
    @@
    - struct clk_onecell_data
    + struct clk_hw_onecell_data

    // Replace of_clk_add_provider() &amp; of_clk_src_simple_get()
    @@
    expression NP, DATA;
    symbol of_clk_src_onecell_get;
    @@
    - of_clk_add_provider(
    + of_clk_add_hw_provider(
	    NP,
    -	of_clk_src_onecell_get,
    +	of_clk_hw_onecell_get,
	    DATA
      )

    // Fix register/unregister
    @@
    identifier CD;
    expression E;
    identifier fn =~ "unregister";
    @@
      fn(...,
    -    CD-&gt;clks[E]
    +    CD-&gt;hws[E]-&gt;clk
	 ,...
	);

    // Fix calls to clk_prepare_enable()
    @@
    identifier CD;
    expression E;
    @@
      clk_prepare_enable(
    - 		     CD-&gt;clks[E]
    + 		     CD-&gt;hws[E]-&gt;clk
      );

    // Fix pointer assignment
    @@
    identifier CD;
    identifier CLK;
    expression E;
    @@
    - CD-&gt;clks[E]
    + CD-&gt;hws[E]
      =
    (
    - CLK
    + __clk_get_hw(CLK)
    |
      ERR_PTR(...)
    )
      ;

    // Fix pointer usage
    @@
    identifier CD;
    expression E;
    @@
    - CD-&gt;clks[E]
    + CD-&gt;hws[E]

    // Fix mtk_clk_pll_get_base()
    @@
    symbol clk, hw, data;
    @@
      mtk_clk_pll_get_base(
    - 		       struct clk *clk,
    + 		       struct clk_hw *hw,
			   const struct mtk_pll_data *data
      ) {
    - struct clk_hw *hw = __clk_get_hw(clk);
      ...
      }

    // Fix mtk_clk_pll_get_base() usage
    @@
    identifier CD;
    expression E;
    @@
      mtk_clk_pll_get_base(
    -    CD-&gt;clks[E]
    +    CD-&gt;hws[E]-&gt;clk
	 ,...
      );

Signed-off-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Miles Chen &lt;miles.chen@mediatek.com&gt;
Tested-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Tested-by: Miles Chen &lt;miles.chen@mediatek.com&gt;
Link: https://lore.kernel.org/r/20220519071610.423372-4-wenst@chromium.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: gate: Clean up included headers</title>
<updated>2022-02-17T20:12:22Z</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wenst@chromium.org</email>
</author>
<published>2022-02-08T12:40:08Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=625afe4f05e111b883b95d1b345fd21c94e64cfa'/>
<id>urn:sha1:625afe4f05e111b883b95d1b345fd21c94e64cfa</id>
<content type='text'>
Some included headers aren't actually used anywhere, while other headers
with the declaration of functions and structures aren't directly
included.

Get rid of the unused ones, and add the ones that should be included
directly.

On the header side, replace headers that are included purely for data
structure definitions with forward declarations. This decreases the
amount of preprocessing and compilation effort required for each
inclusion.

Signed-off-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: Miles Chen &lt;miles.chen@mediatek.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20220208124034.414635-6-wenst@chromium.org
Reviewed-by: Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: gate: Implement unregister API</title>
<updated>2022-02-17T20:12:22Z</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wenst@chromium.org</email>
</author>
<published>2022-02-08T12:40:07Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=44dd1414cf76d3e9f4073a3f9ff9b116dc9e79e9'/>
<id>urn:sha1:44dd1414cf76d3e9f4073a3f9ff9b116dc9e79e9</id>
<content type='text'>
The gate clk type within the MediaTek clk driver library only has a
register function, and no corresponding unregister function. This
means there is no way for its users to properly implement cleanup
and removal.

Add a matching unregister function for the gate type clk.

Signed-off-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: Miles Chen &lt;miles.chen@mediatek.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20220208124034.414635-5-wenst@chromium.org
Reviewed-by: Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: gate: Internalize clk implementation</title>
<updated>2022-02-17T20:12:21Z</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wenst@chromium.org</email>
</author>
<published>2022-02-08T12:40:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ee488dc918bcb1140ad1ebb4459c702c9b53444b'/>
<id>urn:sha1:ee488dc918bcb1140ad1ebb4459c702c9b53444b</id>
<content type='text'>
struct mtk_clk_gate and mtk_clk_register_gate() are not used outside of
the gate clk library. Only the API that handles a list of clks is used
by the individual platform clk drivers.

Internalize the parts that aren't used outside of the implementation.

Signed-off-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: Miles Chen &lt;miles.chen@mediatek.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20220208124034.414635-4-wenst@chromium.org
Reviewed-by: Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: gate: Consolidate gate type clk related code</title>
<updated>2022-02-17T20:12:21Z</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wenst@chromium.org</email>
</author>
<published>2022-02-08T12:40:05Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=19b8d43887f52e65c38fb828c0976656b6302337'/>
<id>urn:sha1:19b8d43887f52e65c38fb828c0976656b6302337</id>
<content type='text'>
Right now some bits of the gate type clk code are in clk-gate.[ch], but
other bits are in clk-mtk.[ch]. This is different from the cpumux and
mux type clks, for which all of the code are found in the same files.

Move the functions that register multiple clks from a given list,
mtk_clk_register_gates_with_dev() and mtk_clk_register_gates(), to
clk-gate.[ch] to consolidate all the code for the gate type clks.

This commit only moves code with minor whitespace fixups to correct
the code style. Further improvements, such as internalizing various
functions and structures will be done in later commits.

Signed-off-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: Miles Chen &lt;miles.chen@mediatek.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20220208124034.414635-3-wenst@chromium.org
Reviewed-by: Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: Register clock gate with device</title>
<updated>2019-09-17T17:22:49Z</updated>
<author>
<name>Weiyi Lu</name>
<email>weiyi.lu@mediatek.com</email>
</author>
<published>2019-09-02T09:00:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e4c23e19aa2a611c2068f7c55487d2cbfea690ef'/>
<id>urn:sha1:e4c23e19aa2a611c2068f7c55487d2cbfea690ef</id>
<content type='text'>
Allow those clocks under a power domain to do the runtime pm operation
by forwarding the struct device pointer from clock provider.

Signed-off-by: Weiyi Lu &lt;weiyi.lu@mediatek.com&gt;
Link: https://lkml.kernel.org/r/1567414859-3244-2-git-send-email-weiyi.lu@mediatek.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174</title>
<updated>2019-05-30T18:26:41Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-27T06:55:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=1802d0beecafe581ad584634ba92f8a471d8a63a'/>
<id>urn:sha1:1802d0beecafe581ad584634ba92f8a471d8a63a</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 655 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: Add MT8183 clock support</title>
<updated>2019-04-11T20:29:19Z</updated>
<author>
<name>Weiyi Lu</name>
<email>weiyi.lu@mediatek.com</email>
</author>
<published>2019-03-05T05:05:45Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=acddfc2c261b3653ab1c1b567a427299bac20d31'/>
<id>urn:sha1:acddfc2c261b3653ab1c1b567a427299bac20d31</id>
<content type='text'>
Add MT8183 clock support, include topckgen, apmixedsys,
infracfg, mcucfg and subsystem clocks.

Signed-off-by: Weiyi Lu &lt;weiyi.lu@mediatek.com&gt;
Tested-by: Nicolas Boichat &lt;drinkcat@chromium.org&gt;
Reviewed-by: Nicolas Boichat &lt;drinkcat@chromium.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: Add flags to mtk_gate</title>
<updated>2019-02-26T17:53:39Z</updated>
<author>
<name>Jasper Mattsson</name>
<email>jasu@njomotys.info</email>
</author>
<published>2019-02-14T16:32:30Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5a1cc4c27ad2aa3f988e2d69ce281fd3e8292ce3'/>
<id>urn:sha1:5a1cc4c27ad2aa3f988e2d69ce281fd3e8292ce3</id>
<content type='text'>
This is required to mark gates as CLK_IS_CRITICAL.

Signed-off-by: Jasper Mattsson &lt;jasu@njomotys.info&gt;
Acked-by: Mars Cheng &lt;mars.cheng@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
