<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/clk/keystone/syscon-clk.c, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2023-08-05T01:10:21Z</updated>
<entry>
<title>clk: keystone: syscon-clk: Fix audio refclk</title>
<updated>2023-08-05T01:10:21Z</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2023-07-28T22:26:39Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=dd1df82ce27a05c7cf0bc5387978412e35fbdaaf'/>
<id>urn:sha1:dd1df82ce27a05c7cf0bc5387978412e35fbdaaf</id>
<content type='text'>
Audio REFCLK's are not working correctly, trying to use them lead to the
following errors:

[    6.575277] of_clk_hw_onecell_get: invalid index 4294934528
[    6.581515] wm8904 1-001a: Failed to get MCLK
[    6.586290] wm8904: probe of 1-001a failed with error -2

The issue is that Audio REFCLK has #clock-cells = 0 [1], while the driver
is registering those clocks assuming they have one cells. Fix this by
registering the clock with of_clk_hw_simple_get() when there is only one
instance, e.g. "audio_refclk".

[1] Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml

Fixes: 6acab96ee337 ("clk: keystone: syscon-clk: Add support for audio refclk")
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://lore.kernel.org/r/20230728222639.110409-1-francesco@dolcini.it
[sboyd@kernel.org: Simplify if-return-else logic]
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: keystone: syscon-clk: Add support for audio refclk</title>
<updated>2023-06-16T19:15:31Z</updated>
<author>
<name>Jai Luthra</name>
<email>j-luthra@ti.com</email>
</author>
<published>2023-06-15T11:55:36Z</published>
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<id>urn:sha1:6acab96ee33703497f30b66efa553a7d0ebd5c0f</id>
<content type='text'>
TI's AM62 SoC can optionally provide two audio reference clocks
(AUDIO_REFCLKx) to external peripherals.

By default this reference clock is looped-back inside the SoC to a mux
that goes to McASP AHCLK, but can optionally be enabled as an output to
peripherals outside the SoC by setting a bit through CTRL_MMR registers.

This bit only controls the direction of the clock, while the parent
is a muxed input from sci-clk [1] which may be a configurable PLL or a
master clock from one of the McASP instances.

Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62x/clocks.html#clocks-for-board0-device [1]
Signed-off-by: Jai Luthra &lt;j-luthra@ti.com&gt;
Link: https://lore.kernel.org/r/20230515-refclk-v3-2-37c0b550f406@ti.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: keystone: syscon-clk: Allow the clock node to not be of type syscon</title>
<updated>2023-06-16T18:57:50Z</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2023-05-16T18:46:25Z</published>
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<id>urn:sha1:595409cf07ade54d6265942f25a3d33b0d76a17c</id>
<content type='text'>
There is a helper device_node_to_regmap() we can use that does not force
this clock DT node to be a "syscon" node. It should work the same in
this case but allow us to remove the unneeded "syscon" compatible.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Link: https://lore.kernel.org/r/20230516184626.154892-1-afd@ti.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: keystone: syscon-clk: Use dev_err_probe() helper</title>
<updated>2022-10-17T23:08:17Z</updated>
<author>
<name>Yang Yingliang</name>
<email>yangyingliang@huawei.com</email>
</author>
<published>2022-09-13T03:19:56Z</published>
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<id>urn:sha1:e104c74427a67158b59d5a7da9b00362e7f5fe53</id>
<content type='text'>
dev_err() can be replace with dev_err_probe() which will check if error
code is -EPROBE_DEFER.

Signed-off-by: Yang Yingliang &lt;yangyingliang@huawei.com&gt;
Link: https://lore.kernel.org/r/20220913031956.984475-1-yangyingliang@huawei.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk</title>
<updated>2022-04-23T02:04:47Z</updated>
<author>
<name>Georgi Vlaev</name>
<email>g-vlaev@ti.com</email>
</author>
<published>2022-04-15T19:03:43Z</published>
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<id>urn:sha1:bae71de51b8901372d7ed5c6b89d32282db7e9ed</id>
<content type='text'>
AM62 has 3 instances of EPWM modules. Each EPWM module has
an EPWM TBCLKEN module input used to individually enable or
disable its EPWM time-base clock. The EPWM time-base clock
enable input comes from the CTRLMMR_EPWM_TB_CLKEN register
bits 0 to 2 in CTRL_MMR0 module (6.1.1.4.1.48 [1]). This
is virtually the same setup as in AM64 but with 3 instead
of 9 clock providers on AM62.

Update the driver with the 3 instances of clocks associated
to a new compatible: "ti,am62-epwm-tbclk".

[1] https://www.ti.com/lit/pdf/spruiv7

Signed-off-by: Georgi Vlaev &lt;g-vlaev@ti.com&gt;
Tested-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Link: https://lore.kernel.org/r/20220415190343.6284-3-g-vlaev@ti.com
Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk</title>
<updated>2021-06-22T21:18:26Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2021-05-28T04:57:43Z</published>
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<id>urn:sha1:87e2a58ca6c7095e5dc43e25212183afbfe0ad64</id>
<content type='text'>
AM64 has 9 instances of EPWM modules. And each instance has a clk to
Timer-Base sub-module that can be controlled by Control module. Update
the driver with all the 9 instance of clocks associated to
ti,am64-epwm-tbclk.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210528045743.16537-3-lokeshvutla@ti.com
Reviewed-by: Tero Kristo &lt;kristo@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>Replace HTTP links with HTTPS ones: Common CLK framework</title>
<updated>2020-07-11T00:15:34Z</updated>
<author>
<name>Alexander A. Klimov</name>
<email>grandmaster@al2klimov.de</email>
</author>
<published>2020-07-03T17:51:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5f1d8970d4cdba6ef3b2f3f11ef15edd62ce551a'/>
<id>urn:sha1:5f1d8970d4cdba6ef3b2f3f11ef15edd62ce551a</id>
<content type='text'>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
          If both the HTTP and HTTPS versions
          return 200 OK and serve the same content:
            Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov &lt;grandmaster@al2klimov.de&gt;
Link: https://lore.kernel.org/r/20200703175114.15027-1-grandmaster@al2klimov.de
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: keystone: Add new driver to handle syscon based clocks</title>
<updated>2020-03-21T00:07:21Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2020-02-27T05:35:29Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=1aa0817e43c525c3ee035786a17a19077a0bb06a'/>
<id>urn:sha1:1aa0817e43c525c3ee035786a17a19077a0bb06a</id>
<content type='text'>
On TI's AM654/J721e SoCs, certain clocks can be gated/ungated by setting
a single bit in SoC's System Control Module registers. Sometime more
than one clock control can be in the same register.

Add a driver to support such clocks using syscon framework. Driver
currently supports controlling EHRPWM's TimeBase clock(TBCLK) for AM654
SoC.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Link: https://lkml.kernel.org/r/20200227053529.16479-3-vigneshr@ti.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
