kernel/drivers/base/regmap/regmap-irq.c, branch linux-5.1.y

Merge remote-tracking branch 'regmap/topic/irq' into regmap-next

2019-01-29T17:17:03Z

regmap: regmap-irq: Add main status register support

2019-01-23T15:52:15Z

There is bunch of devices with multiple logical blocks which can generate interrupts. It's not a rare case that the interrupt reason registers are arranged so that there is own status/ack/mask register for each logical block. In some devices there is also a 'main interrupt register(s)' which can indicate what sub blocks have interrupts pending. When such a device is connected via slow bus like i2c the main part of interrupt handling latency can be caused by bus accesses. On systems where it is expected that only one (or few) sub blocks have active interrupts we can reduce the latency by only reading the main register and those sub registers which have active interrupts. Support this with regmap-irq for simple cases where main register does not require acking or masking. Signed-off-by: Matti Vaittinen Signed-off-by: Mark Brown

regmap-irq: do not write mask register if mask_base is zero

2019-01-14T22:11:22Z

If client have not provided the mask base register then do not write into the mask register. Signed-off-by: Laxman Dewangan Signed-off-by: Jinyoung Park Signed-off-by: Venkat Reddy Talla Signed-off-by: Mark Zhang Signed-off-by: Mark Brown

regmap: regmap-irq: silently ignore unsupported type settings

2018-12-31T19:35:26Z

Do not return error if irq-type setting is requested for controlloer which does not support this. This is how regmap-irq has previously handled the undupported type settings and existing drivers seem to be upset if failure is now reported. Fixes: 1c2928e3e321 ("regmap: regmap-irq/gpio-max77620: add level-irq support") Signed-off-by: Matti Vaittinen Reported-by: Geert Uytterhoeven Signed-off-by: Mark Brown

regmap: irq: add an option to clear status registers on unmask

2018-12-19T18:38:13Z

Some interrupt controllers whose interrupts are acked on read will set the status bits for masked interrupts without changing the state of the IRQ line. Some chips have an additional "feature" where if those set bits are not cleared before unmasking their respective interrupts, the IRQ line will change the state and we'll interpret this as an interrupt although it actually fired when it was masked. Add a new field to the irq chip struct that tells the regmap irq chip code to always clear the status registers before actually changing the irq mask values. Signed-off-by: Bartosz Golaszewski Signed-off-by: Mark Brown

regmap: regmap-irq/gpio-max77620: add level-irq support

2018-12-19T18:35:45Z

Add level active IRQ support to regmap-irq irqchip. Change breaks existing regmap-irq type setting. Convert the existing drivers which use regmap-irq with trigger type setting (gpio-max77620) to work with this new approach. So we do not magically support level-active IRQs on gpio-max77620 - but add support to the regmap-irq for chips which support them =) We do not support distinguishing situation where HW supports rising and falling edge detection but not both. Separating this would require inventing yet another flags for IRQ types. Signed-off-by: Matti Vaittinen Signed-off-by: Mark Brown

regmap: regmap-irq: Remove default irq type setting from core

2018-12-19T17:52:54Z

The common code should not set IRQ type. Read HW defaults to the cache at startup instead of forcing type to EDGE_BOTH. If default setting is needed this should be done via normal mechanisms or by chip specific code if normal mechanisms are not suitable for some reason. Common regmap-irq code should not have defaults hard-coded but keep the HW/boot defaults untouched. Signed-off-by: Matti Vaittinen Tested-by: Bartosz Golaszewski Signed-off-by: Mark Brown

regmap: irq: handle HW using separate rising/falling edge interrupts

2018-12-13T17:07:46Z

Some interrupt controllers use separate bits for controlling rising and falling edge interrupts in the mask register i.e. they have one interrupt for rising edge and one for falling. We already handle the case where we have a single interrupt in the mask register and a separate type configuration register. Add a new switch to regmap_irq_chip which tells the framework to use the mask_base address for configuring the edge of the interrupts that define type_falling/rising_mask values. For such interrupts we never update the type_base bits. For interrupts that don't define type masks or their regmap irq chip doesn't set the type_in_mask to true everything stays the same. Signed-off-by: Bartosz Golaszewski Signed-off-by: Mark Brown

regmap: irq: add chip option mask_writeonly

2017-06-28T19:11:07Z

Some irq controllers have writeonly/multipurpose register layouts. In those cases we read invalid data back. Here we add the option mask_writeonly as masking option. Signed-off-by: Michael Grzeschik Signed-off-by: Mark Brown

regmap: irq: allow to register one cell interrupt controllers

2017-06-09T17:38:06Z

The change makes possible to use regmap-irq interface within drivers of simple interrupt controllers, which don't have an option to handle different interrupt types and thus have one cell interrupt controllers described in device tree bindings. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Mark Brown