<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/base/regmap/regmap-irq.c, branch linux-4.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y</id>
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<updated>2015-02-14T05:26:36Z</updated>
<entry>
<title>regmap-irq: set IRQF_ONESHOT flag to ensure IRQ request</title>
<updated>2015-02-14T05:26:36Z</updated>
<author>
<name>Valentin Rothberg</name>
<email>Valentin.Rothberg@lip6.fr</email>
</author>
<published>2015-02-11T15:37:57Z</published>
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<id>urn:sha1:09cadf6e088b59c335116bf0e2667486bc126c6a</id>
<content type='text'>
Since commit 1c6c69525b40eb76de8adf039409722015927dc3 ("genirq: Reject
bogus threaded irq requests") threaded IRQs without a primary handler
need to be requested with IRQF_ONESHOT, otherwise the request will fail.

The %irq_flags flag is used to request the threaded IRQ and is also a
parameter of the caller.  Hence, we cannot be sure that IRQF_ONESHOT is
set.  This change avoids the potentially missing flag by setting
IRQF_ONESHOT when requesting the threaded IRQ.

Generated by: scripts/coccinelle/misc/irqf_oneshot.cocci

Signed-off-by: Valentin Rothberg &lt;Valentin.Rothberg@lip6.fr&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Fix possible ZERO_SIZE_PTR pointer dereferencing error.</title>
<updated>2014-05-26T15:37:04Z</updated>
<author>
<name>Xiubo Li</name>
<email>Li.Xiubo@freescale.com</email>
</author>
<published>2014-05-19T07:13:45Z</published>
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<id>urn:sha1:e12892070184ee782c207f09722a93d0236be955</id>
<content type='text'>
Since we cannot make sure the 'chip-&gt;num_regs' will always be none zero
from the users, and then if 'chip-&gt;num_regs' equals to zero by mistake
or other reasons, the kzalloc() will return ZERO_SIZE_PTR, which equals
to ((void *)16).

So this patch fix this with just checking the 'chip-&gt;num_regs' before
calling kzalloc().

This also sorts the header files in alphabetical order at the same time.

Signed-off-by: Xiubo Li &lt;Li.Xiubo@freescale.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Set data pointer only on regmap_add_irq_chip success</title>
<updated>2014-03-13T21:47:36Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>k.kozlowski@samsung.com</email>
</author>
<published>2014-03-13T08:06:01Z</published>
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<id>urn:sha1:72a6a5df2c6c06e1a2504a6272d722e435a93bcb</id>
<content type='text'>
After setting the 'data' pointer (wchich is returned to the caller for
freeing later) the regmap_add_irq_chip() could still fail for various
reasons (ENOMEM, regmap_read or regmap_write failure). In such case the
memory under 'data' was freed in error path and error value was returned
but the 'data' variable was not changed.

This could lead to errors if the caller passed such 'data' to
regmap_del_irq_chip().

The 'data' pointer should be changed atomically from the caller
perspective - set it only on regmap_add_irq_chip() success.

Signed-off-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Remove domain on exit</title>
<updated>2014-02-03T12:17:10Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2014-01-22T20:25:48Z</published>
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<id>urn:sha1:b5ab3e5cae097642480b7983c13ff9d3ea21d0de</id>
<content type='text'>
irqdomain now supports removal of domains on exit so we can properly clean
up on deletion of a regmap irqchip.

Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Allow using zero value for ack_base</title>
<updated>2013-12-16T20:50:13Z</updated>
<author>
<name>Alexander Shiyan</name>
<email>shc_work@mail.ru</email>
</author>
<published>2013-12-15T09:36:51Z</published>
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<id>urn:sha1:d3233433356aa1965b60b08ee61465b20e50474b</id>
<content type='text'>
In some cases, clear interrupt register may be at address 0.
This patch allows to use such configurations by adding additional
configuration bit to indicate this.

[With doc fix from Levente Kurusa &lt;levex@linux.com&gt; -- broonie]

Signed-off-by: Alexander Shiyan &lt;shc_work@mail.ru&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: clear status when disable irq</title>
<updated>2013-10-22T12:28:08Z</updated>
<author>
<name>Yi Zhang</name>
<email>yizhang@marvell.com</email>
</author>
<published>2013-10-22T10:44:32Z</published>
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<id>urn:sha1:4bd7145b194af7cd96fc56d2ebee583b3edf03d3</id>
<content type='text'>
clear the status bit if the mask register doesn't prevent
the chip level irq from being asserted

OR in the following sequence, there will be irq storm happens:
1) interrupt is triggered;
2) another thread disables it(the mask bit is set);
3) _Then_ the interrupt thread is not ACKed(the status bit is not cleared),
   and it's ignored;
4) if the irq is still asserted because of the uncleared status bit,
   the irq storm happens;

Signed-off-by: Yi Zhang &lt;yizhang@marvell.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Allow to acknowledge masked interrupts during initialization</title>
<updated>2013-07-23T19:39:12Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2013-07-22T15:15:52Z</published>
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<id>urn:sha1:2753e6f8207355ab72574d48287cec187272a151</id>
<content type='text'>
In case the hardware interrupt mask register does not prevent the chip level
irq from being asserted by the corresponding interrupt status bit, already
set interrupt bits should to be cleared once after masking them during
initialization. Add a flag to let drivers enable this behavior.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Clarify error message when we fail to request primary IRQ</title>
<updated>2013-03-19T10:50:56Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2013-03-19T10:45:04Z</published>
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<id>urn:sha1:eed456f93d01e9476a1e777d22ae8a8382546ab7</id>
<content type='text'>
Display the name for the chip rather than just the primary IRQ so it is
clearer what exactly has failed.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: irq: call pm_runtime_put in pm_runtime_get_sync failed case</title>
<updated>2013-03-01T06:54:16Z</updated>
<author>
<name>Li Fei</name>
<email>fei.li@intel.com</email>
</author>
<published>2013-02-28T07:37:11Z</published>
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<id>urn:sha1:283189d3be56aa6db6f192bb255df68493cd79ac</id>
<content type='text'>
Even in failed case of pm_runtime_get_sync, the usage_count
is incremented. In order to keep the usage_count with correct
value and runtime power management to behave correctly, call
pm_runtime_put(_sync) in such case.

Signed-off-by Liu Chuansheng &lt;chuansheng.liu@intel.com&gt;
Signed-off-by: Li Fei &lt;fei.li@intel.com&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Support wake IRQ mask inversion</title>
<updated>2013-01-04T20:53:44Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2013-01-04T16:35:07Z</published>
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<id>urn:sha1:9442490a02867088bcd5ed6231fa3b35a733c2b8</id>
<content type='text'>
Support devices which have an enable rather than mask register for wake
sources.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
</feed>
